74LVCH16244ADL,118 NXP Semiconductors, 74LVCH16244ADL,118 Datasheet - Page 15

IC BUFF DVR TRI-ST 16BIT 48SSOP

74LVCH16244ADL,118

Manufacturer Part Number
74LVCH16244ADL,118
Description
IC BUFF DVR TRI-ST 16BIT 48SSOP
Manufacturer
NXP Semiconductors
Series
74LVCHr
Datasheet

Specifications of 74LVCH16244ADL,118

Package / Case
48-SSOP
Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
4
Number Of Bits Per Element
4
Current - Output High, Low
24mA, 24mA
Voltage - Supply
1.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
LVC
Number Of Channels Per Chip
16
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
High Level Output Current
- 24 mA
Input Bias Current (max)
80 uA
Low Level Output Current
24 mA
Maximum Power Dissipation
500 mW
Minimum Operating Temperature
- 40 C
Output Current
50 mA
Output Type
3-State
Output Voltage
6.5 V
Propagation Delay Time
11 ns (Typ) @ 1.2 V or 3 ns (Typ) @ 3.3 V
Number Of Lines (input / Output)
16 / 16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74LVCH16244ADL-T
74LVCH16244ADL-T
935238440118
NXP Semiconductors
Fig 13. Package outline SOT1134-1 (HXQFN60U)
74LVC_LVCH16244A_9
Product data sheet
HXQFN60U: plastic thermal enhanced extremely thin quad flat package; no leads;
60 terminals; UTLP based; body 4 x 6 x 0.5 mm
Dimensions
mm
SOT1134-1
Unit
Outline
version
max
nom
min
0.50
0.48
0.46
A
L
0.05
0.02
0.00
L
A
1
1
terminal 1
index area
w
e
v
0.35
0.30
0.25
R
terminal 1
index area
b
IEC
- - -
E
C
C
h
4.1
4.0
3.9
A
A10
D
A1
D2
D1
B
B7
B1
D6
D5
1.90
1.85
1.80
D
h
A11
A32
6.1
6.0
5.9
e
JEDEC
E
All information provided in this document is subject to legal disclaimers.
B20
- - -
B8
3.90
3.85
3.80
D
e
e
E
D
2
1
h
h
B10
B18
References
0
Rev. 09 — 18 March 2010
1/2 e
0.5
A16
A27
b
e
74LVC16244A; 74LVCH16244A
k
e
1
D7
D8
16-bit buffer/line driver; 5 V input/output tolerant; 3-state
1
B11
B17
JEITA
- - -
D3
D4
A17
A26
B
scale
2.5
e
2.5
1/2 e
2
w
v
A
E
e
e
3
e
3
C
C
3
A
4.5
e
e
4
B
4
5 mm
eR
0.5
A
0.25
0.20
0.15
A
k
1
0.35
0.30
0.25
y
1
L
C
detail X
European
projection
0.125
0.075
0.025
L
1
0.07
C
v
X
y
0.05
w
© NXP B.V. 2010. All rights reserved.
0.08
Issue date
y
08-12-17
09-01-22
sot1134-1_po
SOT1134-1
0.1
y
1
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