SAF-C161K-LM Infineon Technologies, SAF-C161K-LM Datasheet - Page 56

• Manufacturer Part Number: SAF-C161K-LM
• Manufacturer: Infineon Technologies

Specifications of SAF-C161K-LM

• Packages: PG-MQFP-80
• Max Clock Frequency: 20.0 MHz
• Sram (incl. Cache): 1.0 KByte
• Program Memory: 0.0 KByte

Demultiplexed Bus (Standard Supply Voltage Range) (cont’d)
(Operating Conditions apply)
ALE cycle time = 4 TCL + 2
Parameter
Data valid to WR
Data hold after WR
ALE rising edge after
RD, WR
Address hold after WR
ALE falling edge to CS
CS low to Valid Data In
CS hold after RD, WR
ALE falling edge to
RdCS, WrCS (with RW-
delay)
ALE falling edge to
RdCS, WrCS (no RW-
delay)
RdCS to Valid Data In
(with RW-delay)
RdCS to Valid Data In
(no RW-delay)
RdCS, WrCS Low Time
(with RW-delay)
RdCS, WrCS Low Time
(no RW-delay)
Data valid to WrCS
Data hold after RdCS
Data Sheet
3)
2)
3)
3)
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
22
24
26
28
38
39
41
42
43
46
47
48
49
50
51
t
A
+
CC 20 +
CC 10 +
CC -10 +
CC 0 +
CC -4 -
CC 6 +
CC 16 +
CC -4 +
CC 30 +
CC 50 +
CC 26 +
SR –
SR –
SR –
SR 0
t
C
+
min.
t
F
Max. CPU Clock
(80 ns at 25 MHz CPU clock without waitstates)
t
t
t
F
F
t
A
= 25 MHz
t
t
t
t
t
t
A
C
F
A
C
C
C
t
52
F
max.
–
–
–
–
10 -
40 +
t
–
–
–
16 +
36 +
–
–
–
–
C
+ 2
t
t
t
A
t
C
C
A
1 / 2TCL = 1 to 25 MHz
min.
2TCL - 20
+
TCL - 10
+
-10 +
0 +
-4 -
–
TCL - 14
+
TCL - 4
+
-4
+
–
–
2TCL - 10
+
3TCL - 10
+
2TCL - 14
+
0
Variable CPU Clock
t
t
t
t
t
t
t
t
C
F
F
A
A
C
C
C
t
t
F
A
t
F
max.
–
–
–
–
10 -
3TCL - 20
+
–
–
–
2TCL - 24
+
3TCL - 24
+
–
–
–
–
t
t
t
C
C
C
t
+ 2
V2.0, 2001-01
A
t
A
C161O
C161K
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns