SAF-C161K-LM Infineon Technologies, SAF-C161K-LM Datasheet - Page 28

• Manufacturer Part Number: SAF-C161K-LM
• Manufacturer: Infineon Technologies

Specifications of SAF-C161K-LM

• Packages: PG-MQFP-80
• Max Clock Frequency: 20.0 MHz
• Sram (incl. Cache): 1.0 KByte
• Program Memory: 0.0 KByte

Special Function Registers Overview
The following table lists all SFRs which are implemented in the C161K/O in alphabetical
order.
Bit-addressable SFRs are marked with the letter “b” in column “Name”. SFRs within the
Extended SFR-Space (ESFRs) are marked with the letter “E” in column “Physical
Address”. Registers within on-chip X-peripherals are marked with the letter “X” in column
“Physical Address”.
An SFR can be specified via its individual mnemonic name. Depending on the selected
addressing mode, an SFR can be accessed via its physical address (using the Data
Page Pointers), or via its short 8-bit address (without using the Data Page Pointers).
Note: The shaded registers are only available in the C161O, not in the C161K.
Table 6
Name
ADDRSEL1
ADDRSEL2
ADDRSEL3
ADDRSEL4
BUSCON0 b FF0C
BUSCON1 b FF14
BUSCON2 b FF16
BUSCON3 b FF18
BUSCON4 b FF1A
CAPREL
CC10IC
CC11IC
CC12IC
CC13IC
CC14IC
CC15IC
CC9IC
CP
CRIC
CSP
Data Sheet
b FF8C
b FF8E
b FF90
b FF92
b FF94
b FF96
b FF8A
b FF6A
C161K/O Registers, Ordered by Name
Physical
Address
FE18
FE1A
FE1C
FE1E
FE4A
FE10
FE08
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
8-Bit
Addr.
0C
0D
0E
0F
86
8A
8B
8C
8D
25
C6
C7
C8
C9
CA
CB
C5
08
B5
04
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Description
Address Select Register 1
Address Select Register 2
Address Select Register 3
Address Select Register 4
Bus Configuration Register 0
Bus Configuration Register 1
Bus Configuration Register 2
Bus Configuration Register 3
Bus Configuration Register 4
GPT2 Capture/Reload Register
EX2IN Interrupt Control Register
EX3IN Interrupt Control Register
EX4IN Interrupt Control Register
EX5IN Interrupt Control Register
EX6IN Interrupt Control Register
EX7IN Interrupt Control Register
EX1IN Interrupt Control Register
CPU Context Pointer Register
GPT2 CAPREL Interrupt Ctrl. Reg.
CPU Code Seg. Pointer Reg. (read only)
24
V2.0, 2001-01
C161O
C161K
0XX0
FC00
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
Reset
Value
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H