TLE 8264-2E Infineon Technologies, TLE 8264-2E Datasheet - Page 82

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TLE 8264-2E

Manufacturer Part Number
TLE 8264-2E
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of TLE 8264-2E

Packages
PG-DSO-36
Transceiver
High Speed CAN ISO 11898 - 5 / 3 x LIN2.0 / J2602
Voltage Regulator Output
2 x 200 mA + 400 mA
Watchdog
Standard and Window Watchdog
Quiescent Current (max.)
28 ?A (typ) Sleep Mode (5V on)
Standby Current
58 ?A (typ) Stop Mode (5V on)
15.6
15.6.1
Since the SPI output data is sent when the SBC is receiving data, the output data are dependent of the previous
SPI command, if no Read Only command is used. Under some conditions there is no “previous command”.
Table 24
depending on the mode where the SBC was before receiving the first SPI command.
.
Table 24
Previous SBC mode
1) This does not clear the bits. It will be reset when the microcontroller requests the read out
Data Sheet
Sleep mode
Fail-Safe mode
Restart mode when failure and config 1 / 3
Restart mode when microcontroller has sent
to Restart mode
SBC Init mode
gives the first SPI output data that is sent to the microcontroller when entering SBC Normal Mode,
SPI Output Data
First SPI output data
First SPI output data frame
Mode selection bits (MS2...0) Configuration select (CS 2..0)
Sleep mode
Fail-Safe mode
Restart mode
Restart mode
Init mode
82
Wake Register interrupt
Limp Home register
Limp Home register
SBC Configuration Register
SBC Configuration Register
Serial Peripheral Interface
Rev. 1.0, 2009-03-31
TLE8264-2E
1)
1)
1)

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