TLE 8264-2E Infineon Technologies, TLE 8264-2E Datasheet - Page 47

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TLE 8264-2E

Manufacturer Part Number
TLE 8264-2E
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of TLE 8264-2E

Packages
PG-DSO-36
Transceiver
High Speed CAN ISO 11898 - 5 / 3 x LIN2.0 / J2602
Voltage Regulator Output
2 x 200 mA + 400 mA
Watchdog
Standard and Window Watchdog
Quiescent Current (max.)
28 ?A (typ) Sleep Mode (5V on)
Standby Current
58 ?A (typ) Stop Mode (5V on)
10.5
All failures are reported in the SPI Diagnostic Encoder except the TxD time-out feature, reported as TxD shorted
to GND and over temperature, which is not reported. In case of failure, the transceiver is automatically switched
to the LIN Receive only mode. The reactivation of the transmitter appears only after the microcontroller has
requested it via SPI, except the over temperature. In this particular case, the transmitter is reactivated after a
transition from dominant to recessive.
10.5.1
If the TxD signal is dominant for a time t >
signal at the bus. This is done to prevent the bus from being permanently blocked due to an error. The
transmission is released by sending the SPI command for LIN Normal Mode. Refer to
.
Figure 20
10.5.2
If the LIN bus signal in dominant for a time
is switched to Receive Only Mode. The failure is signaled via SPI. If the bits are not masked, the INT pin is set to
low. For operation the transceiver needs to be switched back to Normal Mode via SPI.
10.5.3
Similar to the TxD Time-out, a TxD to RxD short circuit would also block the bus communication. To avoid this, the
LIN transceiver has TxD to RxD short circuit detection. This failure is reported to the diagnostic frame of the SPI.
The transmitter is automatically inhibited and is reactivated after an SPI command.
10.5.4
Figure 21
against overtemperature. Exceeding the shutdown temperature results in deactivation of the driving stages.
Nevertheless, the SBC can still receive messages via the RxD output, by setting automatically the LIN into LIN
Receive Only Mode. To avoid a bit failure after cooling down, the signals can be transmitted again only after a
dominant to recessive edge at TxD.
An overtemperature condition causes the transmission stage to deactivate. After the overtemperature condition is
no longer present, transmission is reactivated after the TxD bus signal has changed to recessive level. The failure
is not indicated in the SPI and doesn’t generate any interrupt.
Data Sheet
shows how the transmission stage is deactivated and activated again. The driver stages are protected
V
GND
Failure Detection
TxD Time-out Feature
CC1µC
TxD Time-out Diagram
Bus Dominant Clamping
TxD to RxD Short Circuit Feature
Overtemperature
TxD
V
BUS
LIN
t
TxD_TO
t
t
TxD_TO
>
t
LIN_TO
, the TxD time-out function deactivates the transmission of the
, a bus dominant clamping is detected. The LIN transceiver
TxD Time -out
47
Interrupt
SPI setting : LIN
Normal Mode
Figure
LIN Txd timeout .vsd
Rev. 1.0, 2009-03-31
t
t
20.
LIN Transceiver
TLE8264-2E

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