74LVT125DB,112 NXP Semiconductors, 74LVT125DB,112 Datasheet - Page 12

IC BUFF TRI-ST QD N-INV 14SSOP

74LVT125DB,112

Manufacturer Part Number
74LVT125DB,112
Description
IC BUFF TRI-ST QD N-INV 14SSOP
Manufacturer
NXP Semiconductors
Series
74LVTr
Datasheet

Specifications of 74LVT125DB,112

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
4
Number Of Bits Per Element
1
Current - Output High, Low
32mA, 64mA
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-SSOP
Logic Family
LVT
Number Of Channels Per Chip
4
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
High Level Output Current
- 32 mA
Low Level Output Current
64 mA
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
4 / 4
Output Type
3-State
Propagation Delay Time
2.9 ns at 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LVT125DB
74LVT125DB
935180980112
Philips Semiconductors
Fig 11. Package outline SOT402-1 (TSSOP14)
74LVT_LVTH125_6
Product data sheet
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
UNIT
mm
VERSION
OUTLINE
SOT402-1
max.
1.1
A
0.15
0.05
A
1
0.95
0.80
14
A
1
2
y
IEC
Z
0.25
pin 1 index
A
e
3
D
0.30
0.19
b
p
MO-153
JEDEC
0.2
0.1
c
b
p
8
7
REFERENCES
D
5.1
4.9
0
(1)
Rev. 06 — 6 March 2006
w
M
E
4.5
4.3
(2)
JEITA
scale
0.65
2.5
e
c
A
H
6.6
6.2
2
E
A
1
74LVT125; 74LVTH125
5 mm
L
1
0.75
0.50
L
H
p
E
E
detail X
0.4
0.3
Q
L
L
PROJECTION
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
EUROPEAN
p
0.2
v
Q
3.3 V quad buffer; 3-state
A
(A )
0.13
3
w
X
v
0.1
A
y
M
ISSUE DATE
A
99-12-27
03-02-18
0.72
0.38
Z
(1)
SOT402-1
8
0
o
o
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