MAX9260 Maxim, MAX9260 Datasheet - Page 34

• Manufacturer Part Number: MAX9260
• Description: The MAX9259/MAX9260 chipset presents Maxim's gigabit multimedia serial link (GMSL) technology
• Manufacturer: Maxim

Gigabit Multimedia Serial Link with Spread
Spectrum and Full-Duplex Control Channel
Table 10. MAX9260 Parallel Output Spread
Table 11. MAX9259 Modulation Coefficients and Maximum SDIV Settings
Table 12. MAX9260 Modulation Coefficients and Maximum SDIV Settings
or off, the serial link automatically restarts and remains
unavailable while the MAX9260 relocks to the serial data.
Turning on spread spectrum on either the MAX9259 or
MAX9260 side does not affect the audio data stream.
Changes in the MAX9259 spread settings only affect
MCLK output if it is derived from PCLK_ (MCLKSRC = 0).
Both devices include a sawtooth divider to control the
spread-modulation rate. Autodetection or manual pro-
gramming of the PCLK_ operation range guarantees a
spread-spectrum modulation frequency within 20kHz to
40kHz. Additionally, manual configuration of the saw-
tooth divider (SDIV, 0x03 D[5:0]) allows the user to set a
specific modulation frequency for a specific PCLK_ rate.
Always keep the modulation frequency between 20kHz
to 40kHz to ensure proper operation.
34
SPREAD-SPECTRUM SETTING (%)
_____________________________________________________________________________________
BIT-WIDTH MODE
32-Bit
24-Bit
SS
00
01
10
11
4
2
No spread spectrum. Power-up default when SSEN = low.
Q2% spread spectrum. Power-up default when SSEN = high.
No spread spectrum
Q4% spread spectrum
SPREAD-SPECTRUM
SETTING (%)
MODULATION COEFFICIENT (deci-
0.5
1.5
0.5
1.5
1
3
4
2
1
3
4
2
mal)
208
208
The modulation rates for the MAX9259 or the MAX9260
relate to the PCLK_ frequency as follows:
where:
f
DRS = DRS pin input value (0 or 1)
f
MOD = Modulation coefficient given in Table 11 for the
MAX9259 and Table 12 for the MAX9260
SDIV = 6-bit (MAX9259) or 5-bit (MAX9260) SDIV setting,
manually programmed by the FC
M
PCLK_
COEFFICIENT (decimal)
= Modulation frequency
MODULATION
SPREAD (%)
= Parallel clock frequency (12.5MHz to 104MHz)
Manual Programming of the Spread-
104
104
152
152
204
204
112
112
152
152
80
80
f
M
=
(
1 DRS
+
SDIV UPPER LIMIT (decimal)
)
MOD SDIV
SDIV UPPER LIMIT (deci-
f
PCLK_
Spectrum Divider
×
15
30
mal)
40
63
27
54
15
30
52
63
37
63
21
42