MAX7370 Maxim, MAX7370 Datasheet - Page 19

• Manufacturer Part Number: MAX7370
• Description: The MAX7370 I²C-interfaced peripheral provides microprocessors with management of up to 64 key switches, with optional GPIO and PWM-controlled LED drivers
• Manufacturer: Maxim

with I
The device is designed to be insensitive to resistance,
either in the key switches, or the switch routing to and
from the appropriate COL_ and ROW_ up to 5kI (max).
These controllers are therefore compatible with low-cost
membrane and conductive carbon switches.
The INT, SCL, and AD0 inputs and SDA remain high
impedance with up to 5.5V asserted on them when the
device powers down (V
impedance with up to 5.5V asserted on them when not
powered. Use the device in hot-swap applications.
The LED’s on-time in each PWM cycle is phase delayed by
45N into four evenly spaced start positions. Optimize phas-
ing, when using fewer than four ports as constant-current
Table 5. ESD Test Levels
X = Open level. The level has to be specified in the dedicated
equipment specification. If higher voltages than those shown
are specified, special test equipment might be needed.
Table 6. ESD Waveform Parameters
1A—CONTACT DISCHARGE
LEVEL
LEVEL
1
2
3
4
X
8 x 8 Key-Switch Controller and LED Driver/GPIOs
1
2
3
4
TEST VOLTAGE
2
INDICATED
VOLTAGE
C Interface and High Level of ESD Protection
Special
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(kV)
(kV)
2
4
6
8
2
4
6
8
CC
= 0V). I/O ports remain high
Switch On-Resistance
LEVEL
DISCHARGE Q10%
1B—AIR DISCHARGE
X
1
2
3
4
OF CURRENT
FIRST PEAK
Staggered PWM
22.5
(A)
7.5
Hot Insertion
15
30
VOLTAGE (kV)
Special
TEST
15
2
4
8
DISCHARGE SWITCH
RISE TIME (t r ) WITH
outputs, by allocating the ports with the most appropriate
start positions. For example, if using two constant-current
outputs, choose COL4 and COL6 because their PWM
start positions are evenly spaced. In general, choose
the ports that spread the current demand from the ports’
load supply.
The device operates with a 1.62V to 3.6V power-supply
voltage. Bypass the power supply (V
0.1µF or higher ceramic capacitor as close as possible
to the device. Bypass the logic power supply (V
GND with a 0.1µF or higher ceramic capacitor as close
as possible to the device.
All the device pins meet the ±1.5kV Human Body Model
ESD tolerances. Key-switch inputs and GPIOs meet IEC
61000-4-2 ESD protection. The IEC test stresses consist
of 10 consecutive ESD discharges per polarity at the
maximum specified level and below (per IEC 61000-4-2).
Test criteria include:
• The powered device does not latch up during the ESD
• The device subsequently passes the final test used
Tables 5
Edition 1.1 1999-05: Electromagnetic compatibility (EMC)
Testing and measurement techniques—Electrostatic dis-
charge immunity test.
0.7 to 1
0.7 to 1
0.7 to 1
0.7 to 1
(ns)
discharge event.
for prescreening.
and
6
are taken from the IEC 61000-4-2:
Power-Supply Considerations
(Q30%) AT 30ns
CURRENT
(A)
12
16
4
8
MAX7370
ESD Protection
CC
CURRENT (Q30%)
) to GND with a
AT 60ns
(A)
2
4
6
8
LA
) to