78M6612 Maxim, 78M6612 Datasheet - Page 16

• Manufacturer Part Number: 78M6612
• Description: The Teridian™ 78M6612 is a highly integrated, single-phase, power and energy measurement and monitoring system-on-chip (SoC) that includes a 32-bit compute engine (CE), an MPU core, RTC, and flash
• Manufacturer: Maxim

78M6612 Data Sheet
1.5.8 LCD Drivers
The device in the 68-pin QFN package contains 20 dedicated LCD segment drivers in addition to the 18
multi-use pins described above. Thus, the device is capable of driving between 80 to 152 pixels of LCD
display with 25% duty cycle (or 60 to 114 pixels with 33% duty cycle). At eight pixels per digit, this
corresponds to 10 to 19 digits.
The device in the 64-pin LQFP package contains 18 dedicated LCD segment drivers in addition to the 17
multi-use pins described above. Thus, the device is capable of driving between 72 to 140 pixels of LCD
display with 25% duty cycle (or 60 to 105 pixels with 33% duty cycle). At eight pixels per digit, this
corresponds to 9 to 17 digits.
The LCD drivers are grouped into four commons and up to 38 segment drivers (68-pin package), or 4
commons and 35 segment drivers (64-pin package). The LCD interface is flexible and can drive either
digit segments or enunciator symbols.
Segment drivers SEG18 and SEG19 can be configured to blink at either 0.5 Hz or 1 Hz. The blink rate is
controlled by LCD_Y. There can be up to four pixels/segments connected to each of these drivers.
LCD_BLKMAP18[3:0] and LCD_BLKMAP19[3:0] identify which pixels, if any, are to blink.
1.5.9 EEPROM Interface
The 78M6612 provides hardware support for an optional two-pin or a three-wire (
interface.
Two-Pin EEPROM Interface
The dedicated 2-pin serial interface communicates with external EEPROM devices. The interface is
multiplexed onto the DIO4 (SCK) and DIO5 (SDA) pins.
Three-Wire (µ-Wire) EEPROM Interface
A 500 kHz 3-wire interface, using SDATA, SCK, and a DIO pin for CS is also available.
16
LCD interface memory is powered by the non-volatile supply. The bits of the LCD memory
are preserved in LCD and SLEEP modes, even if their pin is not configured as SEG. In this
case, they can be useful as general- purpose non-volatile storage.
Table 4: Selectable Controls using the DIO_DIR Bits
DIO_R Value
0
1
2
3
4
5
6
7
High priority I/O interrupt (INT0 falling)
Resource Selected for DIO Pin
NONE
Reserved
T0 (counter0 clock)
T1 (counter1 clock)
High priority I/O interrupt (INT0 rising)
Low priority I/O interrupt (INT1 rising)
Low priority I/O interrupt (INT1 falling)
µ
-wire) EEPROM
DS_6612_001
Rev 2