DS28E10 Maxim, DS28E10 Datasheet - Page 6

• Manufacturer Part Number: DS28E10
• Description: The DS28E10 combines secure challenge-and-response authentication functionality based on the FIPS 180-3 specified Secure Hash Algorithm (SHA-1) with 224 bits of one-time programmable user EPROM in a single chip
• Manufacturer: Maxim

Figure 4. 1-Wire CRC Generator
i
Products, Inc.
1-Wire SHA-1 Authenticator
Each device contains a unique ROM ID that is 64 bits
long. The first 8 bits are a 1-Wire family code. The next
48 bits are a unique serial number. The last 8 bits are a
cyclic redundancy check (CRC) of the first 56 bits. See
Figure 3 for details. The 1-Wire CRC is generated using
a polynomial generator consisting of a shift register and
XOR gates as shown in Figure 4. The polynomial is X
X
is available in Application Note 27: Understanding and
Using Cyclic Redundancy Checks with Maxim iButton
Products.
The shift register bits are initialized to 0. Then, starting
with the least significant bit of the family code, one bit
at a time is shifted in. After the 8th bit of the family code
has been entered, the serial number is entered. After the
last bit of the serial number has been entered, the shift
register contains the CRC value. Shifting in the 8 bits of
the CRC returns the shift register to all 0s.
The device has three memory areas: user memory, secu-
rity data, and special function registers. User memory
and special function registers are located in a linear
address space, as shown in Figure 5. The user memory
begins at address 0000h and ends at address 0017h.
Refer to the full data sheet for additional information.
6
Button is a registered trademark of Maxim Integrated
5
+ X
4
X
0
+ 1. Additional information about the 1-Wire CRC
STAGE
1ST
X
1
STAGE
2ND
X
2
STAGE
3RD
X
3
64-Bit ROM ID
STAGE
4TH
Memory
POLYNOMIAL = X
8
®
+
X
8
4
+ X
5
STAGE
5TH
The user-writeable memory is implemented in EPROM
technology. The factory-default state of the memory is
00h. During programming, bits of the target 4-byte block
can be changed to a 1 or a 0. Once a block is written,
the entire 4-byte block becomes automatically write pro-
tected. This means it is not possible to program a block
multiple times, e.g., to change a few bits at a time.
This section describes the commands and flowcharts
needed to use the memory and SHA-1 engine of the
device. Refer to the full data sheet for more informa-
tion.
+ X
4
+ 1
Memory and SHA-1 Function
X
5
STAGE
6TH
X
6
STAGE
7TH
X
INPUT DATA
7
Commands
STAGE
8TH
X
8