LNBH26 STMicroelectronics, LNBH26 Datasheet

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LNBH26

Manufacturer Part Number
LNBH26
Description
Dual LNB supply and control IC with step-up and I2C interface
Manufacturer
STMicroelectronics
Datasheet

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Features
Applications
Table 1.
February 2012
Complete interface between LNB and I²C bus
Built-in DC-DC converter for single 12 V supply
operation and high efficiency (typ. 93% @
0.5 A)
Selectable output current limit by external
resistor
Compliant with main satellite receivers output
voltage specification (15 programmable levels)
Accurate built-in 22 kHz tone generator suits
widely accepted standards
22 kHz tone waveform integrity guaranteed
also at no load condition
Low drop post regulator and high efficiency
step-up PWM with integrated power N-MOS
allowing low power losses
LPM function (low power mode) to reduce
dissipation
Overload and overtemperature internal
protection with I²C diagnostic bits
LNB short-circuit dynamic protection
+/- 4 kV ESD tolerant on output power pins
STB satellite receivers
TV satellite receivers
PC card satellite receivers
Dual LNBS supply and control IC with step-up and I²C interface
LNBH26PQR
Order code
Device summary
Doc ID 022771 Rev 1
QFN24 (4 x 4)
Package
Description
Intended for analog and digital dual satellite
receivers/Sat-TV, and Sat-PC cards, the LNBH26
is a monolithic voltage regulator and interface IC,
assembled in QFN24 4x4 specifically designed to
provide the 13/18 V power supply and the 22 kHz
tone signalling to the LNB down-converter in the
antenna dishes or to the multi-switch box. In this
application field, it offers a complete solution for
dual tuner satellite receivers with extremely low
component count, low power dissipation together
with simple design and I²C standard interfacing.
QFN24 (4 x 4 mm)
Tape and reel
Packaging
LNBH26
www.st.com
1/38
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Related parts for LNBH26

LNBH26 Summary of contents

Page 1

... LNBH26PQR February 2012 Description Intended for analog and digital dual satellite receivers/Sat-TV, and Sat-PC cards, the LNBH26 is a monolithic voltage regulator and interface IC, assembled in QFN24 4x4 specifically designed to provide the 13/18 V power supply and the 22 kHz tone signalling to the LNB down-converter in the antenna dishes or to the multi-switch box ...

Page 2

... PNG: input voltage minimum detection . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.18 ISW: inductor switching current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.19 COMP: boost capacitor ESR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.20 OLF: overcurrent and short-circuit protection and diagnostic . . . . . . . . . . . 9 2.21 OTF: thermal protection and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 5 Typical application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6 I²C bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 2/38 Doc ID 022771 Rev 1 LNBH26 ...

Page 3

... LNBH26 6.1 Data validity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6.2 Start and stop condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6.3 Byte format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6.4 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 6.5 Transmission without acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 7 I²C interface protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7.1 Write mode transmission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7.2 Read mode transmission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 7.3 Data registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.4 Status registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 8 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 8.1 Output voltage selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Doc ID 022771 Rev 1 ...

Page 4

... SDA DSQIN-B I²C Digital core DAC Drop control Tone ctrl Diagnostics Protections Linear Regulator Tone detector Current Limit selection Voltage reference ISEL GND BYP VCC Doc ID 022771 Rev 1 LNBH26 LX-B PGND VUP-B Linear VOUT-B Regulator DETIN-B Tone detector DSQOUT-B BPSW-B FLT AM10475v1 ...

Page 5

... The DSQIN is a logic input pin which activates the 22 kHz tone to the V LNBH26 integrated tone generator. The output tone waveforms are internally controlled by the LNBH26 tone generator in terms of rise/fall time and tone amplitude, while, the external 22 kHz signal on the DSQIN pin is used to define the frequency and the duty cycle of the output tone ...

Page 6

... LPM (low power mode) In order to reduce total power loss, each section of the LNBH26 is provided with the LPM I²C bit that can be activated (LPM=1) in applications where the 22 kHz tone can be disabled for long time periods. The LPM bit can be set to “1” when the DiSEqC™ data transmission is not requested (no 22 kHz tone output is present) ...

Page 7

... I²C bus. 2.8 Diagnostic and protection functions The LNBH26 has 14 diagnostic internal functions provided via the I²C bus, by reading 14 bits on two STATUS registers (in read mode). All the diagnostic bits are, in normal operation (that is, no failure detected), set to LOW. One diagnostic bit is dedicated to the ...

Page 8

... FLT: Fault FLAG In order to get an immediate feedback on a diagnostic status, the LNBH26 is equipped with a dedicated fault flag pin (FLT). In the case an overload (OLF bit=1), overheating (OTF bit=1) or power not good (PNG bit=1) condition is detected, the FLT pin (open drain output) is set to low and is kept low until the relevant activating diagnostic bit is cleared. Be aware that diagnostic bits OLF, OTF and PNG, once activated, are kept latched to “ ...

Page 9

... IMON function is activated by means of EN_IMON=1, the (typ.) independently on the VSEL bit setting. This operation is applied in order to be sure that the LNBH26 output has the higher voltage present in the LNB bus. Do not use this function in an application environment where voltage level is not supported by other peripherals connected to the LNB bus ...

Page 10

... For this purpose, one I²C bit in the DATA4 register UP time of typically 900 ms. Simultaneously, the OFF in which no overload is detected, normal operation is ON pin) is disabled. To re-enable the output stage, the VSEL bits must be OUT Doc ID 022771 Rev 1 LNBH26 Table 3 for threshold details. time ( 180 ms typ ...

Page 11

... OTF: thermal protection and diagnostic The LNBH26 is also protected against overheating: when the junction temperature exceeds 150 °C (typ.), the step-up converter and both liner regulators are shut off, the diagnostic OTF bit in the STATUS1 register is set to “1” and the FLT pin is set to low level. After the overtemperature condition is removed, normal operation can be resumed in two ways, according to the THERM I² ...

Page 12

... The RSEL resistor defines the same current limit both for channels A and B. Doc ID 022771 Rev DETIN -A - BPSW - VCC 17 17 BYP 16 16 GND BPSW - DETIN - AM10476v1 Pin function Section 2.5 . Also see the ISET LNBH26 ...

Page 13

... It can be used as DiSEqC envelope input or external 22 kHz TTL input depending on the EXTM-A I²C bit setting as follows: If EXTM-A=0, TEN-A=1: it accepts the DiSEqC envelope code from the main microcontroller. The LNBH26 uses this code to modulate the internally generated 22 kHz carrier. If EXTM-A=TEN-A=1: it accepts external 22 kHz logic signals which activate the 22 kHz tone output (refer to Pull up high if the tone output is activated only by the TEN-A I² ...

Page 14

... It can be used as DiSEqC envelope input or external 22 kHz TTL input depending on the EXTM-B I²C bit setting as follows: If EXTM-B=0, TEN-B=1: it accepts the DiSEqC envelope code from the main microcontroller. The LNBH26 uses this code to modulate the internally generated 22 kHz carrier. If EXTM-A=TEN-A=1: it accepts external 22 kHz logic signals which activate the 22 kHz tone output (refer to Pull up high if the tone output is activated only by the TEN-B I² ...

Page 15

... LNBH26 4 Maximum ratings Table 3. Absolute maximum ratings Symbol V DC power supply input voltage pins input voltage UP I Output current OUT V DC output pin voltage OUT V Logic input pin voltage (SDA, SCL, DSQIN, ADDR pins Logic output pin voltage (FLT, DSQOUT) ...

Page 16

... placed as close as possible > I where I sat peak peak Doc ID 022771 Rev 1 LNBOUT OUT-A D3-A C5-A DiSEqC DSQIN-A 22 22KHz Tone enable control DSQIN-B 24 DiSEqC ADDR 6 Envelope FLT OUT-B LNBOUT-B C5-B D3-B Notes Table 2 (AV) > 0 pin OUT is the boost converter peak current LNBH26 TTL or TTL AM10477v1 ...

Page 17

... S1A-S1M, or any similar general purpose rectifier L1 10 µH inductor with I L2 220 µH inductor 2STR2160 or 2STF2340 or any small power PNP with IC > 250 mA used. TR1 Also any small power PMOS with ID > 250 mA, R used. D2 UP-A LNBH26 C2-A C3-A LX-A 3 DSQOUT-A R1 (RSEL) ISEL 9 Byp 16 C7 Vcc 17 ...

Page 18

... Transmission without acknowledge If detection of the acknowledge of the LNBH26 is not required, the microprocessor can use a simpler transmission: it simply waits one clock without checking the slave acknowledging, and sends the new data. This approach is of course less protected from misworking and decreases noise immunity. ...

Page 19

... LNBH26 Figure 8. Data validity on the I²C bus Figure 9. Timing diagram of I²C bus Figure 10. Acknowledge on the I²C bus Doc ID 022771 Rev 1 I²C bus interface 19/38 ...

Page 20

... I²C interface protocol 7 I²C interface protocol 7.1 Write mode transmission The LNBH26 interface protocol is made up of: ● a start condition (S) ● a chip address byte with the LSB bit R ● a register address (internal address of the first register to be accessed) ● a sequence of data (byte to write in the addressed internal register + acknowledge) ● ...

Page 21

... LSB bit R/W=1 ● after the acknowledge the LNBH26 starts to send the addressed register content. As long as the master keeps the acknowledge LOW, the LNBH26 transmits the next address register byte content. ● ...

Page 22

... Bit 2 VSEL3-A Bit 3 VSEL4-A Bit 4 VSEL1-B Bit 5 VSEL2-B B Bit 6 VSEL3-B Bit 7 VSEL4-B (MSB) N/A = Reserved bit. All bits reset to “0” at power-on. 22/38 Value 0/1 0/1 Output voltage selection bits. 0/1 0/1 0/1 0/1 Output voltage selection bits. 0/1 0/1 Doc ID 022771 Rev 1 Description Channel A (Refer to Table 14 ) Channel B Table 14 (Refer to ) LNBH26 ...

Page 23

... LNBH26 Table 8. DATA 2 (Read/Write register. Register address = 0X3) Bit Name CH Value 1 Bit 0 TEN-A (LSB Bit 1 LPM Bit 2 EXTM-A 0 Bit 3 N Bit 4 TEN Bit 5 LPM Bit 6 EXTM-B 0 Bit 7 N/A 0 (MSB) N/A = Reserved bit. All bits reset power-on. Description 22 kHz tone enabled ...

Page 24

... Pulsed (Dynamic) LNB output current limiting is activated Pulsed (Dynamic) LNB output current T Pulsed (Dynamic) LNB output current T Doc ID 022771 Rev 1 time set to 180 ms typ. ON time set typ. ON pin) set to lower current range: pin) set to default range: time set to 180 ms typ. ON time set typ. ON LNBH26 ...

Page 25

... LNBH26 Table 10. DATA 4 (Read/Write register. Register address = 0X5) Bit Name CH Value 1 Bit 0 EN_IMON- A (LSB Bit 1 N/A 0 Bit 2 N Bit 3 OLR A EN_IMON- Bit Bit 5 N Bit 6 THERM A Bit 7 COMP (MSB) 0 Description IMON diagnostic function is enabled. IMON diagnostic function is disabled. Keep always at “0” if IMON is not used. ...

Page 26

... Table 10 . Junction overtemperature not detected, T protection threshold. Input voltage (V pin) lower than LPD minimum thresholds. Refer to CC Input voltage (V pin) higher than LPD thresholds. Refer to CC Doc ID 022771 Rev 1 LNBH26 > Refer to Table 9 OUT MAX pin (I < OUT OUT MAX > ...

Page 27

... LNBH26 Table 12. STATUS 2 (Read register. Register address = 0X1) Bit Name CH Value 1 Bit 0 TDET-A A (LSB Bit 1 TDET Bit 2 TMON Bit 3 TMON Bit 4 IMON Bit 5 IMON Bit 6 N/A - Bit 7 N/A - (MSB) N/A = Reserved bit. All bits reset power-on. Description ...

Page 28

... Doc ID 022771 Rev mA, unless otherwise stated. Typical Section 7 ). Min. Typ OUT 2 -3.5 100 750 500 350 400 280 200 500 4 6 1.5 1.5 900 T / OFF OFF 5 0.55 0.675 LNBH26 Max. Unit +3 1100 750 mA 550 0 ...

Page 29

... LNBH26 Table 13. Electrical characteristics of section A/B (continued) Symbol Parameter F Tone frequency TONE D Tone duty cycle TONE (2) tr, tf Tone rise or fall time Eff DC-DC converter efficiency DC/DC DC-DC converter switching F SW frequency UVLO Undervoltage lockout thresholds Low power diagnostic (LPD thresholds V DSQIN, pin logic low ...

Page 30

... Electrical characteristics 8.1 Output voltage selection Each LNBH26 channel is provided with 15 output voltage levels (7 levels for 13 V range when VSEL4-A/B=0 and 8 levels for 18 V range when VSEL4-A/B=1) which can be selected through the register Data1. VSELx bit combinations both for channel A and B. If all VSELx are set to “0” the device is set in standby mode and the VOUT-A/B is disabled ...

Page 31

... LNBH26 T from ° Table 16. Address pin characteristics Symbol Parameter “0001000(R/W)” address pin V ADDR-1 voltage range “0001001(R/W)” address pin V ADDR-2 voltage range Refer to Section 5 DSQIN = LOW, V referred ° access to the system register. Table 17. Output voltage diagnostic (VMON-A/B bits, STATUS 1 register) characteristics ...

Page 32

... Test condition DETIN pin AC coupled DETIN pin AC coupled DETIN pin AC coupled Doc ID 022771 Rev mA, unless IN OUT = 25 ° pin voltage. See J OUT OUT Min. Typ. 200 300 900 1100 13 16.5 24 29.5 LNBH26 Max. Unit 400 mV 1200 mV 20 kHz 38 kHz ...

Page 33

... LNBH26 9 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at trademark. Table 20. QFN24L ( mm) mechanical data Dim ...

Page 34

... Package mechanical data Figure 13. QFN24L ( mm) package dimensions 34/38 Doc ID 022771 Rev 1 LNBH26 7596209_D ...

Page 35

... LNBH26 Tape & reel QFNxx/DFNxx (4x4) mechanical data Dim. Min 12 mm. Typ. Max. 330 13.2 0.504 0.795 101 3.898 14.4 4.35 4.35 1 Doc ID 022771 Rev 1 Package mechanical data inch. Min. Typ. Max. 12.992 0.519 3.976 0.567 0.171 0.171 0.043 ...

Page 36

... Package mechanical data Figure 14. QFN24L ( footprint recommended data (mm.) 36/38 Doc ID 022771 Rev 1 LNBH26 ...

Page 37

... LNBH26 10 Revision history Table 21. Document revision history Date Revision 03-Feb-2012 1 Initial release. Doc ID 022771 Rev 1 Revision history Changes 37/38 ...

Page 38

... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 38/38 Please Read Carefully: © 2012 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com Doc ID 022771 Rev 1 LNBH26 ...

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