LNBH25L STMicroelectronics, LNBH25L Datasheet - Page 5

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LNBH25L

Manufacturer Part Number
LNBH25L
Description
LNB supply and control IC with step-up and IA?C interface
Manufacturer
STMicroelectronics
Datasheet

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LNBH25L
2
2.1
2.2
Application information
This IC has a built-in DC-DC step-up converter that, from a single source (8 V to 16 V),
generates the voltages (V
13 V / 18 V LNB output voltages plus the 22 kHz DiSEqC™ tone) to work with a minimum
dissipated power of 0.5 W typ. @ 500 mA load (the LDO drop voltage is internally kept at
V
disables the whole circuit when the supplied V
typically). The step-up converter soft-start function reduces the inrush current during
startup. The SS time is internally fixed at 4ms typ. to switch from 0 to 13 V and 6 ms typ. to
switch from 0 to 18 V.
DiSEqC data encoding (DSQIN pin)
The internal 22 kHz tone generator is factory trimmed in accordance to DiSEqC standards,
and can be activated in 3 different ways:
1.
2.
3.
Data encoding by external 22 kHz tone TTL signal
In order to improve design flexibility an external tone signal can be input to the DSQIN pin by
setting the EXTM bit to “1”.
The DSQIN is a logic input pin which activates the 22 kHz tone to the V
LNBH25L integrated tone generator.
The output tone waveforms are internally controlled by the LNBH25L tone generator in
terms of rise/fall time and tone amplitude, while, the external 22 kHz signal on the DSQIN
pin is used to define the frequency and the duty cycle of the output tone. A TTL compatible
22 kHz signal is required for the proper control of the DSQIN pin function. Before sending
the TTL signal on the DSQIN pin, the EXTM and TEN bits must be previously set to “1”. As
soon as the DSQIN internal circuit detects the 22 kHz TTL external signal code, the
LNBH25L activates the 22 kHz tone on the V
signal activation, and it stops with about 60 µs delay after the 22 kHz TTL signal on DSQIN
has expired (refer to
Figure 2.
UP
- V
by an external 22 kHz source DiSEqC data connected to the DSQIN logic pin (TTL
compatible). In this case the I²C tone control bits must be set: EXTM = TEN = 1.
by an external DiSEqC data envelope source connected to the DSQIN logic pin. In this
case the I²C tone control bits must be set: EXTM=0 and TEN=1.
through the TEN I²C bit if a 22 kHz presence is requested in continuous mode. In this
case the DSQIN TTL pin must be pulled HIGH and EXTM bit set to “0”.
OUT
= 1 V typ.). The IC is also provided with an undervoltage lockout circuit that
Tone enable and disable timing (using external waveform)
Tone
Output
DSQIN
Figure 2
~ 1 µs
UP
) that let the integrated LDO post-regulator (generating the
).
Doc ID 022634 Rev 2
OUT
CC
output with about 1 µs delay from TTL
drops below a fixed threshold (4.7 V
~ 60 µs
Application information
AM10426v1
OUT
pin, by using the
5/28

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