LNBH25L STMicroelectronics, LNBH25L Datasheet

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LNBH25L

Manufacturer Part Number
LNBH25L
Description
LNB supply and control IC with step-up and IA?C interface
Manufacturer
STMicroelectronics
Datasheet

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Features
Applications
Description
Intended for analog and digital satellite
receivers/Sat-TV and Sat-PC cards, the
LNBH25L is a monolithic voltage regulator and
interface IC, assembled in QFN24 (4x4)
specifically designed to provide the 13/18 V
power supply and the 22 kHz tone signalling to
Table 1.
February 2012
Complete interface between LNB and I²C bus
Built-in DC-DC converter for single 12 V supply
operation and high efficiency (typ. 93% @
0.5 A)
Selectable output current limit by external
resistor
Compliant with main satellite receiver output
voltage specifications
Accurate built-in 22 kHz tone generator suits
widely accepted standards
22 kHz tone waveform integrity guaranteed
also at no load condition
Low-drop post regulator and high efficiency
step-up PWM with integrated power N-MOS
allowing low power losses
Overload and overtemperature internal
protection with I²C diagnostic bits
LNB short-circuit dynamic protection
+/- 4 kV ESD tolerant on output power pins
STB satellite receivers
TV satellite receivers
PC card satellite receivers
LNBH25LPQR
Order code
Device summary
LNB supply and control IC with step-up and I²C interface
Doc ID 022634 Rev 2
QFN24 (4 x 4)
Package
the LNB down-converter in the antenna dish or to
the multi-switch box. In this application field, it
offers a complete solution with extremely low
component count and low power dissipation
together with a simple design and I²C standard
interfacing.
QFN24 (4 x 4 mm)
Tape and reel
Packaging
LNBH25L
www.st.com
1/28
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LNBH25L Summary of contents

Page 1

... TV satellite receivers ■ PC card satellite receivers Description Intended for analog and digital satellite receivers/Sat-TV and Sat-PC cards, the LNBH25L is a monolithic voltage regulator and interface IC, assembled in QFN24 (4x4) specifically designed to provide the 13/18 V power supply and the 22 kHz tone signalling to Table 1. Device summary ...

Page 2

... Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 Typical application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6 I²C bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6.1 Data validity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6.2 Start and stop condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6.3 Byte format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6.4 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6.5 Transmission without acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 7 I²C interface protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7.1 Write mode transmission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7.2 Read mode transmission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7.3 Data registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 2/28 Doc ID 022634 Rev 2 LNBH25L ...

Page 3

... LNBH25L 7.4 Status registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 8 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Doc ID 022634 Rev 2 Contents 3/28 ...

Page 4

... Block diagram 1 Block diagram Figure 1. Block diagram 4/28 ADDR SCL SDA I2C Digital core DSQIN DAC Drop control Tone ctrl Diagnostics Protections Current ISEL Limit selection Voltage reference GND BYP VCC Doc ID 022634 Rev 2 LX PGND VUP Linear VOUT Regulator AM10460v1 LNBH25L ...

Page 5

... The DSQIN is a logic input pin which activates the 22 kHz tone to the V LNBH25L integrated tone generator. The output tone waveforms are internally controlled by the LNBH25L tone generator in terms of rise/fall time and tone amplitude, while, the external 22 kHz signal on the DSQIN pin is used to define the frequency and the duty cycle of the output tone. A TTL compatible 22 kHz signal is required for the proper control of the DSQIN pin function. Before sending the TTL signal on the DSQIN pin, the EXTM and TEN bits must be previously set to “ ...

Page 6

... Register writing is accessible via the I²C bus. 6/28 pin is activated with about 6 µs delay from the DSQIN TTL OUT DSQIN ~ 6 µs Tone Output . 1 111 Doc ID 022634 Rev 2 DC voltage to OUT Figure µ µs AM10427v1 can be set up to MAX LNBH25L Section 7.3 ...

Page 7

... Diagnostic and protection functions The LNBH25L has 3 diagnostic internal functions provided via the I²C bus, by reading 3 bits on the STATUS1 register (in read mode). All the diagnostic bits are, in normal operation (that is no failure detected), set to LOW. Two diagnostic bits are dedicated to the overtemperature and overload protection status (OTF and OLF) ...

Page 8

... OTF: thermal protection and diagnostic The LNBH25L is also protected against overheating: when the junction temperature exceeds 150 °C (typ.), the step-up converter and the linear regulator are shut off, the diagnostic OTF bit in the STATUS1 register is set to “1”. After the overtemperature condition is removed, normal operation can be resumed in two ways, according to the THERM I² ...

Page 9

... V Step-up voltage GND DSQIN VUP VOUT NC GND LX LNBH25L NC SCL SDA ISEL Name Integrated N-channel Power MOSFET drain. DC-DC converter power ground connected directly to the Epad. Two I²C bus addresses available by setting the address pin level voltage. See Table 15 Clock from I² ...

Page 10

... It can be used as DiSEqC envelope input or external 22 kHz TTL input depending on the EXTM I²C bit setting as follows: EXTM=0, TEN=1: it accepts the DiSEqC envelope code from the input main microcontroller. The LNBH25L uses this code to modulate the internally generated 22 kHz carrier. or EXTM=TEN=1: it accepts external 22 kHz logic signals which activate the 22 kHz tone output (refer to Pull up high if the tone output is activated only by the TEN I² ...

Page 11

... LNBH25L 4 Maximum ratings Table 3. Absolute maximum ratings Symbol V DC power supply input voltage pins input voltage UP I Output current OUT V DC output pin voltage OUT V Logic input pins voltage (SDA, SCL, DSQIN, ADDR pins input voltage V Internal reference pin voltage ...

Page 12

... Table 12 and ISEL pin description in > < 0 placed as close as possible > I where I sat peak peak Doc ID 022634 Rev 2 Vout Byp A-GND C7 15 Notes Table 2 (AV) > 0 pin. OUT is the boost converter peak current. LNBH25L to LNB AM10462v1 ...

Page 13

... SDA line remains at the HIGH level during the ninth clock pulse time. In this case the master transmitter can generate the STOP information in order to abort the transfer. The LNBH25L does not generate an acknowledge if the V V typ ...

Page 14

... I²C bus interface Figure 7. Data validity on the I²C bus Figure 8. Timing diagram of I²C bus Figure 9. Acknowledge on the I²C bus 14/28 Doc ID 022634 Rev 2 LNBH25L ...

Page 15

... The transfer lasts until a stop bit is encountered ● the LNBH25L, as slave, acknowledges every byte transfer. Figure 10. Example of writing procedure starting with first data address 0x2 CHIP ADDRESS MSB LSB ...

Page 16

... LSB bit R/W=1 ● after the acknowledge the LNBH25L starts to send the addressed register content. As long as the master keeps the acknowledge LOW, the LNBH25L transmits the next address register byte content. ...

Page 17

... LNBH25L 7.3 Data registers The data 1..4 registers can be addressed both in write and read mode. In read mode they return the last writing byte status received in the previous write transmission. The following tables provide the register address values of data 1..4 and a function description of each bit. ...

Page 18

... In case of thermal protection activation (OTF=1) the LNB output (V automatically enabled as soon as the overtemperature condition is removed (OTF=0) with the previous VSEL bits setting. Reserved. Keep to “0” Doc ID 022634 Rev 2 Description Description OUT OUT LNBH25L pin) is pin) is ...

Page 19

... LNBH25L 7.4 Status registers The STATUS 1, 2 registers can be addressed only in read mode and provide the diagnostic functions described in the following tables. Table 10. STATUS 1 (Read register. Register address = 0X0) BIT Name Value 1 Bit 0 OLF (LSB) 0 Bit 1 N/A - Bit 2 N/A - Bit 3 N/A - Bit 4 N/A - Bit 5 N Bit 6 ...

Page 20

... Doc ID 022634 Rev mA, unless otherwise stated. Typical Section 7 ). Min. Typ. Max -3.5 +3.5 75 500 350 350 4 6 1.5 1.5 900 T /10 OFF 0.55 0.675 440 4.8 4.7 7.2 6.7 LNBH25L Unit 100 750 mA 550 0 kHz µs % kHz V V ...

Page 21

... Doc ID 022634 Rev 2 Electrical characteristics Min. Typ. Max 150 15 Function V disabled. LNBH25L set in standby OUT Unit V V µ °C °C 21/28 ...

Page 22

... SDA, SCL 0 (1) SDA (open drain SCL = Test condition R/W bit determines the transmission mode: read (R/W=1) write (R/W=0) R/W bit determines the transmission mode: read (R/W=1) write (R/W=0) Doc ID 022634 Rev 2 LNBH25L Min. Typ. Max. Unit 0 -10 10 µA 0.6 V 400 kHz Min. ...

Page 23

... LNBH25L 9 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at trademark. Table 16. QFN24L ( mm) mechanical data Dim ...

Page 24

... Package mechanical data Figure 12. QFN24L ( mm) package dimensions 24/28 Doc ID 022634 Rev 2 LNBH25L 7596209_D ...

Page 25

... LNBH25L Tape & reel QFNxx/DFNxx (4x4) mechanical data Dim. Min 12 mm. Typ. Max. Min. 330 13.2 0.504 0.795 101 3.898 14.4 4.35 4.35 1 Doc ID 022634 Rev 2 Package mechanical data inch. Typ. Max. 12.992 0.519 3.976 0.567 0.171 0.171 0.043 ...

Page 26

... Package mechanical data Figure 13. QFN24L ( footprint recommended data (mm.) 26/28 Doc ID 022634 Rev 2 LNBH25L ...

Page 27

... LNBH25L 10 Revision history Table 17. Document revision history Date Revision 09-Jan-2012 1 15-Feb-2012 2 Initial release. Modified: D1 and D3 Table 5 on page 12 Doc ID 022634 Rev 2 Revision history Changes . 27/28 ...

Page 28

... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 28/28 Please Read Carefully: © 2012 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com Doc ID 022634 Rev 2 LNBH25L ...

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