STR912FAZ47 STMicroelectronics, STR912FAZ47 Datasheet - Page 90
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STR912FAZ47
Manufacturer Part Number
STR912FAZ47
Description
ARM966E-S™ 16/32-Bit Flash MCU with Ethernet, USB, CAN, AC motor control, 4 timers, ADC, RTC, DMA
Manufacturer
STMicroelectronics
Datasheet
1.STR911FAW47.pdf
(102 pages)
Specifications of STR912FAZ47
Arm966e-s Risc Core
Harvard architecture, 5-stage pipeline, Tightly-Coupled Memories (SRAM and Flash)
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Electrical characteristics
7.13
Table 47.
1. Guaranteed by design, not tested in production.
2. The ADC clock can be disabled by setting the ADC bit in the SCU_PCGR1 register or by setting the ACG bit in the
3. Conditions: AV
4. The A/D is monotonic, there are no missing codes.
5. 1 LSB = (AV
6. Data based on characterization, not tested in production.
7. Conditions: V
90/102
V
RES
N
f
t
t
t
C
E
E
E
E
E
I
I
ADC
POR(ADC)
ck_off(ADC)
STAB
ADC
VREF
Symbol
AIN
D
L
O
G
T
CH
IN
SCU_GPIOANA register (for Rev H and higher)
Input voltage range
Resolution
Number of input channels
ADC clock frequency
POR bit set to Standby mode
ADC clock disabled before conversion
Stabilization time
Input capacitance
Differential non-linearity
Integral non-linearity
Offset error
Gain error
Total unadjusted error
Power consumption
Current on VREF input pin
ADC electrical characteristics
V
General ADC electrical characteristics
DD
DD
DDQ
SS
- AV
=1.8 V, f
= 0 V, AV
= 2.7 - 3.6 V, V
SS
)/1024
CPU
Parameter
DD
=96 MHz , f
= 3.3 V f
DD
(1)
ADC
ADC
= 1.65 - 2 V, T
= 25 MHz.
=24 MHz
Doc ID 13495 Rev 6
(2)
conditions
A
= -40 / 85 °C unless otherwise specified.
(3) (4)
(6) (7)
Test
(3)
(3)
(3)
(3)
Min
0
Value
Typ
0.5
4.6
5
1
3
3
4
AV
Max
500
920
10
25
15
STR91xFAxxx
8
1
3
6
6
2
6
REF
LSB
LSB
LSB
LSB
LSB
MHz
Unit
Bits
mA
ms
ms
µA
pF
µs
V
N
(5)
(5)
(5)
(5)
(5)