ST72521R9 STMicroelectronics, ST72521R9 Datasheet - Page 31

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ST72521R9

Manufacturer Part Number
ST72521R9
Description
8-BIT MCU WITH NESTED INTERRUPTS, FLASH, 10-BIT ADC, FIVE TIMERS, SPI, SCI, I2C, CAN INTERFACE
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72521R9

Hdflash Endurance
100 cycles, data retention
Clock Sources
crystal/ceramic resonator oscillators, internal RC oscillator and bypass for external clock
Four Power Saving Modes
Halt, Active-Halt, Wait and Slow
Main Clock Controller With
Real time base, Beep and Clock-out capabilities
Two 16-bit Timers With
2 input captures, 2 output compares, external clock input on one timer, PWM and pulse generator modes
8-bit Pwm Auto-reload Timer With
2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector
SYSTEM INTEGRITY MANAGEMENT (Cont’d)
6.4.3 Low Power Modes
6.4.3.1 Interrupts
The AVD interrupt event generates an interrupt if
the corresponding Enable Control Bit (AVDIE) is
WAIT
HALT
Mode
No effect on SI. AVD interrupts cause the
device to exit from Wait mode.
The CRSR register is frozen.
Description
set and the interrupt mask in the CC register is re-
set (RIM instruction).
AVD event
Interrupt Event
Event
AVDF
Flag
ST72F521, ST72521B
Control
Enable
AVDIE
Bit
from
Wait
Exit
Yes
31/215
from
Halt
Exit
No

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