ST72321R6 STMicroelectronics, ST72321R6 Datasheet - Page 170

• Manufacturer Part Number: ST72321R6
• Description: 8-BIT MCU WITH NESTED INTERRUPTS, FLASH,10-BIT ADC, FIVE TIMERS, SPI, SCI, I2C INTERFACE
• Manufacturer: STMicroelectronics

Specifications of ST72321R6

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator, clock security system and bypass for external clock
• Four Power Saving Modes: Halt, Active-Halt,Wait and Slow
• Main Clock Controller With: Real time base, Beep and Clock-out capabilities
• Two 16-bit Timers With: 2 input captures, 2 output compares, external clock input on one timer, PWM and pulse generator modes
• 8-bit Pwm Auto-reload Timer With: 2 input captures, 4 PWM outputs, output compare and time base interrupt, external clock with event detector

ST72321Rx ST72321ARx ST72321Jx
10-BIT ADC CHARACTERISTICS (Cont’d)
12.12.3 ADC Accuracy
Conditions: V
Notes:
1. ADC Accuracy vs. Negative Injection Current: Injecting negative current may reduce the accuracy of the conversion
being performed on another analog input.
Any positive injection current within the limits specified for I
accuracy.
2. Data based on characterization results, monitored in production to guarantee 99.73% within ± max value from -40°C
to 125°C (± 3σ distribution limits).
Figure 100. ADC Accuracy Characteristics
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Symbol
1023
1022
1021
|E
|E
|E
|E
|E
7
6
5
4
3
2
1
O
G
D
T
L
0
V
|
|
|
|
|
SSA
Digital Result ADCDR
1LSB
Total unadjusted error
Offset error
Gain Error
Differential linearity error
Integral linearity error
1
E
O
IDEAL
DD
2
=5V
1)
Parameter
3
=
1)
V
--------------------------------------------
1)
AREF
4
1024
5
–
1 LSB
1)
V
1)
SSA
E
1)
6
T
IDEAL
E
7
L
(2)
CPU in run mode @ f
CPU in run mode @ f
E
D
1021 1022 1023 1024
(3)
INJ(PIN)
(1)
Conditions
E
G
V
AREF
and ΣI
ADC
ADC
(1) Example of an actual transfer curve
(2) The ideal transfer curve
(3) End point correlation line
E
between the actual and the ideal transfer curves.
E
transition and the first ideal one.
E
transition and the last actual one.
E
between actual steps and the ideal one.
E
between any actual transition and the end point
correlation line.
2 MHz.
2 MHz.
INJ(PIN)
T
O
G
D
L
=Total Unadjusted Error: maximum deviation
=Integral Linearity Error: maximum deviation
=Offset Error: deviation between the first actual
=Gain Error: deviation between the last ideal
=Differential Linearity Error: maximum deviation
V
in
(LSB
in
Section 12.8
IDEAL
Typ
)
0.5
3
2
1
1
does not affect the ADC
Max
4
3
3
2
2
2)
Unit
LSB