ST92150JDV1QAuto STMicroelectronics, ST92150JDV1QAuto Datasheet - Page 354
ST92150JDV1QAuto
Manufacturer Part Number
ST92150JDV1QAuto
Description
8/16-bit single voltage Flash MCU family with RAM, E3 TM(emulated EEPROM), CAN 2.0B and J1850 BLPD
Manufacturer
STMicroelectronics
Datasheet
1.ST92150JDV1QAUTO.pdf
(430 pages)
Specifications of ST92150JDV1QAuto
Internal Memory
Single Voltage FLASH up to 256 Kbytes, RAM up to 8Kbytes, 1K byte E3 TM (Emulated EEPROM)
Minimum Instruction Time
83 ns (24 MHz int. clock)
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ST92124xxx-Auto/150xxxxx-Auto/250xxxx-Auto
CONTROLLER AREA NETWORK (Cont’d)
CAN FILTER CONFIGURATION REG.2 (CFCR2)
All bits of this register are set and cleared by soft-
ware.
Read / Write
Reset Value: 0000 0000 (00h)
Note: To modify FFAx and FSCx bits bxCAN must
be in INIT mode.
Bit 7 = FFA5 Filter FIFO Assignment for Filter 5
The message passing through this filter will be
stored in the specified FIFO.
0: Filter assigned to FIFO 0
1: Filter assigned to FIFO 1
Bit 6:5 = FSC5[1:0] Filter Scale Configuration
These bits define the scale configuration of Filter
5.
Bit 4 = FACT5 Filter Active
The software sets this bit to activate Filter 5. To
modify the filter 5 registers (CF5R[7:0]), the
FACT5 bit must be cleared.
0: Filter 5 is not active
1: Filter 5 is active
Bit 3 = FFA4 Filter FIFO Assignment for Filter 4
The message passing through this filter will be
stored in the specified FIFO.
0: Filter assigned to FIFO 0
1: Filter assigned to FIFO 1
Bit 2:1 = FSC4[1:0] Filter Scale Configuration
These bits define the scale configuration of Filter
4.
Bit 0 = FACT4 Filter Active
The software sets this bit to activate filter 4. To
modify the Filter 4 registers (CF4R[7:0]), the
FACT4 bit must be cleared).
0: Filter 4 is not active
1: Filter 4 is active
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9
FFA5 FSC51 FSC50 FACT5 FFA4 FSC41 FSC40 FACT4
7
0
CAN FILTER CONFIGURATION REG.3 (CFCR3)
All bits of this register are set and cleared by soft-
ware.
Read / Write
Reset Value: 0000 0000 (00h)
Bit 7 = FFA7 Filter FIFO Assignment for Filter 7
The message passing through this filter will be
stored in the specified FIFO.
0: Filter assigned to FIFO 0
1: Filter assigned to FIFO 1
Bit 6:5 = FSC7[1:0] Filter Scale Configuration
These bits define the scale configuration of Filter
7.
Bit 4 = FACT7 Filter Active
The software sets this bit to activate Filter 7. To
modify the Filter 7 registers (CF7R[7:0]), the
FACT7 bit must be cleared.
0: Filter 7 is not active.
1: Filter 7 is active.
Bit 3 = FFA6 Filter FIFO Assignment for Filter 6
This bit allows the software to define whether the
message passing through this filter will be as-
signed to the receive FIFO0 or FIFO1.
0: Filter assigned to FIFO 0
1: Filter assigned to FIFO 1
Bit 2:1 = FSC6[1:0] Filter Scale Configuration
These bits define the scale configuration of Filter
6.
Bit 0 = FACT6 Filter Active
The software sets this bit to activate Filter 6. To
modify the Filter 6 registers (CF6R[7:0]), the
FACT6 bit must be cleared.
0: Filter 6 is not active
1: Filter 6 is active
FFA7 FSC71 FSC70 FACT7 FFA6 FSC61 FSC60 FACT6
7
0
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