ST72215G2 STMicroelectronics, ST72215G2 Datasheet - Page 121

• Manufacturer Part Number: ST72215G2
• Description: 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY,ADC, 16-BIT TIMERS, SPI, I2C INTERFACES
• Manufacturer: STMicroelectronics

Specifications of ST72215G2

• Emulation Voltage: 5.5 V

13.9 CONTROL PIN CHARACTERISTICS
13.9.1 Asynchronous RESET Pin
Subject to general operating conditions for V
Figure 86. Typical Application with RESET pin
Notes:
1. Unless otherwise specified, typical data are based on T
2. Data based on characterization results, not tested in production.
3. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested.
4. The I
(I/O ports and control pins) must not exceed I
5. The R
scribed in
6. To guarantee the reset of the device, a minimum pulse has to be applied to RESET pin. All short pulses applied on
RESET pin with a duration below t
7. The reset network (the resistor and two capacitors) protects the device against parasitic resets, especially in a noisy
environments.
8. The output of the external reset circuit must have an open-drain output to drive the ST7 reset pad. Otherwise the device
can be damaged when the ST7 generates an internal reset (LVD or watchdog).
t
w(RSTL)out
t
t
Symbol
h(RSTL)in
g(RSTL)in
R
V
V
V
V
EXTERNAL
CIRCUIT
hys
ON
OL
IH
IL
RESET
USER
IO
ON
current sunk must always respect the absolute maximum rating specified in
Figure
Input low level voltage
Input high level voltage
Schmitt trigger voltage hysteresis
Output low level voltage
(see
Weak pull-up equivalent resistor
Generated reset pulse duration
External reset pulse hold time
Filtered glitch duration
pull-up equivalent resistor is based on a resistive transistor (corresponding I
8)
87). This data is based on characterization results, not tested in production.
Figure
V
DD
0.1µF
0.1µF
88,
Parameter
V
Figure
DD
4.7kΩ
h(RSTL)in
2)
89)
7)
2)
4)
6)
can be ignored.
5)
VSS
3)
.
DD
ST72104Gx, ST72215Gx, ST72216Gx, ST72254Gx
V
V
External pin or
internal reset sources
, f
DD
IN
OSC
=
RESET
=5V
8)
V
A
Conditions
SS
=25°C and V
, and T
R
ON
I
I
V
V
IO
IO
DD
DD
V
=+5mA
=+2mA
DD
=5V
=3.4V
A
unless otherwise specified.
DD
=5V.
0.7xV
Min
20
80
20
DD
Section 13.2.2
ON
Typ
0.68
0.28
400
100
40
30
6
current characteristics de-
1)
INTERNAL
RESET CONTROL
WATCHDOG RESET
LVD RESET
0.3xV
and the sum of I
Max
0.95
0.45
120
100
60
DD
ST72XXX
1/f
121/141
Unit
SFOSC
mV
kΩ
µs
µs
ns
V
V
IO