ST7LITEU09 STMicroelectronics, ST7LITEU09 Datasheet - Page 89
ST7LITEU09
Manufacturer Part Number
ST7LITEU09
Description
ST7ULTRALITE - 8-BIT MCU WITH 2K SINGLE VOLTAGE FLASH MEMORY, ADC, TIMERS
Manufacturer
STMicroelectronics
Datasheet
1.ST7LITEU09.pdf
(139 pages)
Specifications of ST7LITEU09
2k Bytes Single Voltage Flash Program Memory With Read-out Protection, In-circuit And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention
20 years at 55°C
128 Bytes Data Eeprom. 300k Write/erase Cycles Guaranteed, Data Retention
20 years at 55°C
Clock Sources
internal trimmable 8MHz RC oscillator, internal low power, low frequency RC oscillator or external clock
Five Power Saving Modes
Halt, Auto Wake Up from Halt, Active-Halt, Wait and Slow
One 8-bit Lite Timer (lt) With Prescaler Including
watchdog, 1 realtime base and 1 input capture
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ST7LITEU05 ST7LITEU09
12.1.2
12.1.3
12.1.4
Table 39.
Immediate
Immediate instructions have 2 bytes, the first byte contains the opcode, the second byte
contains the operand value.
Table 40.
Direct
In Direct instructions, the operands are referenced by their memory address.
The direct addressing mode consists of two submodes:
Direct (short) addressing mode
the address is a byte, thus requires only 1 byte after the opcode, but only allows 00 - ff
addressing space.
Direct (long) addressing mode
The address is a word, thus allowing 64 Kbyte addressing space, but requires 2 bytes after
the opcode.
Indexed mode (no offset, short, long)
In this mode, the operand is referenced by its memory address, which is defined by the
unsigned addition of an index register (X or Y) with an offset.
The indirect addressing mode consists of three submodes:
Indexed mode (no offset)
There is no offset (no extra byte after the opcode), and allows 00 - FF addressing space.
Indexed mode (short)
The offset is a byte, thus requires only 1 byte after the opcode and allows 00 - 1FE
addressing space.
SLL, SRL, SRA, RLC, RRC
SWAP
Inherent instruction
Immediate instruction
ADC, ADD, SUB, SBC
Instructions supporting inherent addressing mode (continued)
Instructions supporting inherent immediate addressing mode
AND, OR, XOR
BCP
CP
LD
Shift and rotate operations
Swap nibbles
Arithmetic operations
Logical operations
Function
Bit compare
Function
Compare
Load
Instruction set
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