STM8AF6268 STMicroelectronics, STM8AF6268 Datasheet - Page 75

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STM8AF6268

Manufacturer Part Number
STM8AF6268
Description
STM8AF62 Standard Line
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM8AF6268

Max Fcpu
16 MHz
Flash Program Memory
16 to 32 Kbytes Flash; data retention 20 years at 55 °C after 1 kcycle
Data Memory
0.5 to 1 Kbyte true data EEPROM; endurance 300 kcycles
Ram
1 to 2 Kbytes
Advanced Control Timer
16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization

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STM8AF61xx, STM8AF62xx
10.3.12
EMC characteristics
Susceptibility tests are performed on a sample basis during product characterization.
Functional EMS (electromagnetic susceptibility)
While executing a simple application (toggling 2 LEDs through I/O ports), the product is
stressed by two electromagnetic events until a failure occurs (indicated by the LEDs).
A device reset allows normal operations to be resumed. The test results are given in the
table below based on the EMS levels and classes defined in application note AN1709.
Designing hardened software to avoid noise problems
EMC characterization and optimization are performed at component level with a typical
application environment and simplified MCU software. It should be noted that good EMC
performance is highly dependent on the user application and the software in particular.
Therefore it is recommended that the user applies EMC software optimization and
prequalification tests in relation with the EMC level requested for his application.
Software recommendations
The software flowchart must include the management of runaway conditions such as:
Prequalification trials
Most of the common failures (unexpected reset and program counter corruption) can be
recovered by applying a low state on the NRST pin or the oscillator pins for 1 second.
To complete these trials, ESD stress can be applied directly on the device, over the range of
specification values. When unexpected behavior is detected, the software can be hardened
to prevent unrecoverable errors occurring (see application note AN1015).
Table 44.
V
V
Symbol
FESD
EFTB
ESD : Electrostatic discharge (positive and negative) is applied on all pins of the device
until a functional disturbance occurs. This test conforms with the IEC 1000-4-2
standard.
FTB : A burst of fast transient voltage (positive and negative) is applied to V
through a 100 pF capacitor, until a functional disturbance occurs. This test conforms
with the IEC 1000-4-4 standard.
Corrupted program counter
Unexpected reset
Critical data corruption (control registers...)
Voltage limits to be applied on any I/O pin to
induce a functional disturbance
Fast transient voltage burst limits to be
applied through 100 pF on V
pins to induce a functional disturbance
EMS data
Parameter
Doc ID 14952 Rev 5
DD
and V
SS
V
f
Conforms to IEC 1000-4-2
V
f
Conforms to IEC 1000-4-4
MASTER
MASTER
DD
DD
= 3.3 V, T
= 3.3 V, T
= 16 MHz (HSI clock),
= 16 MHz (HSI clock),
Conditions
A
A
= 25 °C,
= 25 °C,
Electrical characteristics
DD
Level/class
and V
3B
4A
75/91
SS

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