STM8AF6268 STMicroelectronics, STM8AF6268 Datasheet - Page 27

• Manufacturer Part Number: STM8AF6268
• Description: STM8AF62 Standard Line
• Manufacturer: STMicroelectronics

Specifications of STM8AF6268

• Max Fcpu: 16 MHz
• Flash Program Memory: 16 to 32 Kbytes Flash; data retention 20 years at 55 °C after 1 kcycle
• Data Memory: 0.5 to 1 Kbyte true data EEPROM; endurance 300 kcycles
• Ram: 1 to 2 Kbytes
• Advanced Control Timer: 16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization

STM8AF61xx, STM8AF62xx
Table 10.
number
23
24
25 17 PE5/SPI_NSS
26 18 PC1/TIM1_CH1
27 19 PC2/TIM1_CH2
28 20 PC3/TIM1_CH3
29 21 PC4/TIM1_CH4
30 22 PC5/SPI_SCK
31
32
33 23 PC6/SPI_MOSI
34 24 PC7/SPI_MISO
35
36
37
38
39
40
41 25 PD0/TIM3_CH2
42 26 PD1/SWIM
43 27 PD2/TIM3_CH1
44 28 PD3/TIM2_CH2
45 29
46 30
Pin
- PE7/AIN8
- V
- V
- PG0
- PG1
- PE3/TIM1_BKIN
- PE2/I
- PE1/I
- PE0/CLK_CCO
PE6/AIN9
PD4/TIM2_CH1/
BEEP
PD5/
LINUART_TX
SSIO_2
DDIO_2
Pin name
STM8AF61xx/62xx (32 Kbytes) microcontroller pin description
2
2
C_SDA
C_SCL
(7)
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
I/O X
S
S
-
-
Input
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
-
-
-
-
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
-
-
-
-
HS O3
HS O3
HS O3
HS O3
HS O3
HS O4
HS O3
HS O3
HS O3
Doc ID 14952 Rev 5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Output
O1
O1
O1
O3
O3
O3
O1
O1
O1
O1 T
O1 T
O3
O1
-
-
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
-
-
(6)
(6)
X Port E7 Analog input 8
X Port E7 Analog input 9
X Port E5 SPI master/slave select —
X Port C1 Timer 1 - channel 1
X Port C2 Timer 1- channel 2
X Port C3 Timer 1 - channel 3
X Port C4 Timer 1 - channel 4
X Port C5 SPI clock
X Port C6
X Port C7 SPI master in/ slave out —
X Port G0 -
X Port G1 -
X Port E3 Timer 1 - break input
X Port E0
X Port D0 Timer 3 - channel 2
X Port D1 SWIM data interface
X Port D2 Timer 3 - channel 1
X Port D3 Timer 2 - channel 2
X Port D4 Timer 2 - channel 1
X Port D5 LINUART data transmit —
- I/O ground
- I/O power supply
- Port E2 I
- Port E1 I
SPI master out/
slave in
Configurable clock
output
2
2
C data
C clock
Default alternate
Pinouts and pin description
function
(1)(2)
(continued)
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
TIM1_BKIN
[AFR3]/
CLK_CCO
[AFR2]
—
TIM2_CH3
[AFR1]
ADC_ETR
[AFR0]
BEEP output
[AFR7]
function after
[option bit]
Alternate
remap
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