STM32F215RG STMicroelectronics, STM32F215RG Datasheet - Page 48

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STM32F215RG

Manufacturer Part Number
STM32F215RG
Description
High-performance ARM Cortex-M3 MCU with 1 Mbyte Flash, 120 MHz CPU, ART Accelerator, HW crypto
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32F215RG

10/100 Ethernet Mac With Dedicated Dma
supports IEEE 1588v2 hardware, MII/RMII

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Pinouts and pin description
Table 5.
48/168
55 89 133 161 A10
56 90 134 162 A9
57 91 135 163 A6
-
-
-
-
-
-
-
-
-
-
-
87 122 150 B11
88 123 151 A11
- 124 152 C10
- 125 153 B10
- 126 154 B9
- 127 155 B8
- 128 156 A8
- 131 159 C7
- 132 160 B7
- 129 157 A7
- 130 158 D7
Pins
STM32F21x pin and ball definitions (continued)
Pin name
V
V
PG10
PG11
PG12
PG13
PG14
PG15
PG9
PD6
PD7
PB3
PB4
PB5
SS_11
DD_11
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
I/O FT
Doc ID 17050 Rev 6
S
S
TRACESWO
(after reset)
function
NJTRST
V
V
JTDO/
PG10
PG11
PG12
PG13
PG14
PG15
Main
PG9
PD6
PD7
PB5
SS_11
DD_11
(3)
FSMC_NE4 / USART6_RTS/
ETH_PPS_OUT/TIM3_CH2 /
FSMC_NWAIT/USART2_RX
USART6_CTS / DCMI_D13/
FSMC_A24 / USART6_CTS
USART2_CK/FSMC_NE1/F
FSMC_NE2/FSMC_NCE3/
FSMC_A25 / USART6_TX
SPI1_MOSI/ SPI3_MOSI /
SMC_NCE2/ EVENTOUT
FSMC_NE3/ EVENTOUT
TIM3_CH1 / SPI1_MISO/
I2C1_SMBA/ CAN2_RX /
SPI3_SCK / I2S3_SCK /
TIM2_CH2 / SPI1_SCK/
NJTRST/ SPI3_MISO /
DCMI_D10 / I2S3_SD/
OTG_HS_ULPI_D7 /
Alternate functions
JTDO/ TRACESWO/
ETH _RMII_TX_EN/
ETH_MII_TX_EN /
ETH_RMII_TXD0/
ETH_RMII_TXD1/
FSMC_NCE4_2 /
/ETH_MII_TXD0/
/ETH_MII_TXD1/
FSMC_NCE4_1/
USART6_RX /
/ EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
EVENTOUT
STM32F215xx, STM32F217xx
functions
Other

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