EP2AGX260EF29I5 Altera Corporation, EP2AGX260EF29I5 Datasheet - Page 69

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EP2AGX260EF29I5

Manufacturer Part Number
EP2AGX260EF29I5
Description
IC ARRIA II GX FPGA 260K 780FBGA
Manufacturer
Altera Corporation
Series
Arria II GXr
Datasheet

Specifications of EP2AGX260EF29I5

Number Of Logic Elements/cells
244188
Number Of Labs/clbs
10260
Total Ram Bits
12038144
Number Of I /o
372
Number Of Gates
-
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-BBGA
Lead Free Status
Contains lead
Rohs Status
RoHS non-compliant

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Chapter 1: Device Datasheet for Arria II Devices
Switching Characteristics
Table 1–53. High-Speed I/O Specifications for Arria II GX Devices (Part 1 of 4)
December 2011 Altera Corporation
Clock
f
(input clock
frequency)–Row
I/O
f
(input clock
frequency)–
Column I/O
f
(output clock
frequency)–Row
I/O
f
(output clock
frequency)–
Column I/O
HSCLK_IN
HSCLK_IN
HSCLK_OUT
HSCLK_OUT
Symbol
Periphery Performance
1
Clock boost
Clock boost
Conditions
1 to 40
1 to 40
factor, W =
factor, W =
This section describes periphery performance, including high-speed I/O, external
memory interface, and IOE programmable delay.
I/O performance supports several system interfaces, for example the high-speed I/O
interface, external memory interface, and the PCI/PCI-X bus interface. I/O using
SSTL-18 Class I termination standard can achieve up to the stated DDR2 SDRAM
interfacing speed with typical DDR2 SDRAM memory interface setup. I/O using
general purpose I/O (GPIO) standards such as 3.0, 2.5, 1.8, or 1.5 LVTTL/LVCMOS
are capable of typical 200 MHz interfacing frequency with 10pF load.
Actual achievable frequency depends on design- and system-specific factors. You
should perform HSPICE/IBIS simulations based on your specific design and system
setup to determine the maximum achievable frequency in your system.
High-Speed I/O Specification
Table 1–53
(1)
(1)
lists the high-speed I/O timing for Arria II GX devices.
Min
5
5
5
5
I3
Max
670
500
670
500
Min
5
5
5
5
C4
Arria II Device Handbook Volume 3: Device Datasheet and Addendum
Max
670
500
670
500
Min
5
5
5
5
C5,I5
472.5
472.5
Max
622
622
Min
5
5
5
5
C6
472.5
472.5
Max
500
500
MHz
MHz
MHz
MHz
Unit
1–61

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