LTC1042CN8 Linear Technology, LTC1042CN8 Datasheet - Page 4

• Manufacturer Part Number: LTC1042CN8
• Description: IC CMOS COMPARATOR WINDOW 8DIP
• Manufacturer: Linear Technology
• Series: LTCMOS™r
• Type: Windowr

Specifications of LTC1042CN8

• Number Of Elements: 1
• Output Type: TTL
• Voltage - Supply: 2.8 V ~ 16 V
• Mounting Type: Through Hole
• Package / Case: 8-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

APPLICATIO S I FOR ATIO
The LTC1042 uses sampled data techniques to achieve its
unique characteristics. It consists of two comparators,
each of which has two differential inputs (Figure 1). When
the sum of the voltages on a comparator’s inputs is
positive, the output is high; when the sum is negative, the
output is low. The inputs are interconnected such that
when (CENTER – WIDTH/2) ≤ V
both comparator outputs are low. In this condition V
within the window and the WITHIN WINDOW output is
high. When V
window and the ABOVE WINDOW output is high.
An important feature of the LTC1042 is the non-interaction
of the inputs. This means the center and width of the
window can be changed without one affecting the other.
Also note that the width of the window is set by a ground
referred signal WlDTH/2).
Strobing
An internal oscillator allows the LTC1042 to strobe itself.
The frequency of oscillation sets the sampling rate and is
set with an external RC network (see typical curve, OSC
frequency vs R
conditions, R
There is no limit to the size of C
A sampling cycle is initiated on the positive going transi-
tion of the voltage on the OSC pin. When this voltage is
near the positive supply, a Schmitt trigger trips and
initiates the sampling cycle. A sampling cycle consists of
applying power to both comparators, sampling the inputs,
LTC1042
4
(WINDOW
WINDOW
CENTER)
WIDTH/2
CENTER
(V
GND
OSC
V
IN
IN
)
2
3
5
4
7
EXT
IN
EXT
> CENTER + WIDTH/2, V
must be between 100kΩ and 10MΩ.
, C
GENERATOR
U
EXT
TIMING
). To assure oscillation, under all
U
+
–
+
–
+
–
+
–
COMP A
COMP B
4
IN
EXT
4
≤ (CENTER + WIDTH/2)
(A)
W
.
IN
Figure 1. LTC1042 Block Diagram
is above the
U
80µs
8
1
6
IN
V
WITHIN WINDOW
ABOVE WINDOW
(BELOW WINDOW)
+
is
POWER ON
POWER OFF
storing the results in CMOS output latches and turning the
power off. This whole process takes approximately 80µs.
During the 80µs “active” time, the LTC1042 draws
typically 1.2mA (l
consumed only during the “active” time, extremely low
average power consumption can be achieved at low sample
rates. For example, at a sample rate of 1 sample/second
the average power consumption is:
Power = (V
At low sampling rates, R
sumption. R
age voltage at the OSC pin is approximately V
power consumed by R
Example: Assume R
This is more than ten times the typical power consumed by
the LTC1042 at V
power is a premium, R
possible. Note that the power dissipated by R
function of the sampling frequency or C
If high sampling rates are needed and power consumption
is of secondary importance, a convenient way to get the
maximum possible sampling rate is to make R
and C
active time, will nominally be ≈ 10kHz.
P(R
P(R
EXT
EXT
EXT
= 0.48µW
) = (V
) = (2.5)
= 0. The sampling rate, set by the LTC1042’s
+
EXT
) (I
+
V
0V
/2)
S(AVG)
consumes power continuously. The aver-
+
2
S(ON)
/1MΩ = 6.25µW
+
2
R
EXT
= 5V and 1 sample/second. Where
EXT
WINDOW
CENTER
) = 5V • 1.2mA • 80µs/1sec
V
EXT
L
) at V
–WIDTH/2
= 1MΩ and V
EXT
INPUT VOLTAGE, V
EXT
is:
should be made as large as
+
dominates the power con-
= 5V. Because power is
WIDTH/2
WITHIN
WINDOW
(B)
IN
+
V
U
= 5V. Then:
EXT
.
LTC1042 • AI01
EXT
ABOVE
WINDOW
EXT
= 100kΩ
+
/2. The
is not a
1042fa