PSMN2R5-30YL NXP Semiconductors, PSMN2R5-30YL Datasheet - Page 2

• Manufacturer Part Number: PSMN2R5-30YL
• Description: Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology
• Manufacturer: NXP Semiconductors

NXP Semiconductors
2. Pinning information
Table 2.
3. Ordering information
Table 3.
4. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
PSMN2R5-30YL
Product data sheet
Pin
1
2
3
4
mb
Type number
PSMN2R5-30YL
Symbol
V
V
V
V
I
I
P
T
T
Source-drain diode
I
I
Avalanche ruggedness
E
D
DM
S
SM
stg
j
DS
DSM
DGR
GS
tot
DS(AL)S
Continuous current is limited by package.
Symbol Description
S
S
S
G
D
Pinning information
Ordering information
Limiting values
Parameter
drain-source voltage
peak drain-source voltage
drain-gate voltage
gate-source voltage
drain current
peak drain current
total power dissipation
storage temperature
junction temperature
source current
peak source current
non-repetitive drain-source
avalanche energy
source
source
source
gate
mounting base; connected to
drain
LFPAK
Package
Name
Description
plastic single-ended surface-mounted package (LFPAK); 4 leads SOT669
All information provided in this document is subject to legal disclaimers.
Conditions
T
t
E
T
V
V
pulsed; t
see
T
T
pulsed; t
V
V
Rev. 04 — 10 March 2011
p
j
j
mb
mb
DS(AL)
GS
GS
GS
sup
Simplified outline
≤ 25 ns; f ≤ 500 kHz;
≥ 25 °C; T
≥ 25 °C; T
Figure 3
= 25 °C; see
= 25 °C
= 10 V; T
= 10 V; T
= 10 V; T
≤ 30 V; R
≤ 240 nJ; pulsed
SOT669 (LFPAK)
p
p
≤ 10 µs; T
≤ 10 µs; T
N-channel 30 V 2.4 mΩ logic level MOSFET in LFPAK
j
j
1 2 3 4
≤ 175 °C
≤ 175 °C; R
mb
mb
j(init)
GS
mb
= 100 °C; see
= 25 °C; see
= 50 Ω; unclamped
Figure 2
= 25 °C; I
mb
mb
= 25 °C;
= 25 °C
GS
D
= 20 kΩ
= 100 A;
Figure 1
Figure 1
Graphic symbol
PSMN2R5-30YL
[1]
[1]
[1]
mbb076
G
Min
-
-
-
-20
-
-
-
-
-55
-55
-
-
-
© NXP B.V. 2011. All rights reserved.
D
S
175
175
Version
Max
30
35
30
20
100
100
580
88
100
580
103
Unit
V
V
V
V
A
A
A
W
°C
°C
A
A
mJ
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