PHKD6N02LT NXP Semiconductors, PHKD6N02LT Datasheet - Page 2

Dual logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology

PHKD6N02LT

Manufacturer Part Number
PHKD6N02LT
Description
Dual logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology
Manufacturer
NXP Semiconductors
Datasheet

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2. Pinning information
Table 2.
3. Ordering information
Table 3.
4. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134).
PHKD6N02LT
Product data sheet
Pin
1
2
3
4
5
6
7
8
Type number
PHKD6N02LT
Symbol
V
V
V
I
I
P
T
T
Source-drain diode
I
I
D
DM
S
SM
stg
j
DS
DGR
GS
tot
Symbol Description
S1
G1
S2
G2
D2
D2
D1
D1
Pinning information
Ordering information
Limiting values
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
peak drain current
total power dissipation
storage temperature
junction temperature
source current
peak source current
source1
gate1
source2
gate2
drain2
drain2
drain1
drain1
Package
Name
SO8
Description
plastic small outline package; 8 leads; body width 3.9 mm
Conditions
T
T
T
see
T
see
T
device conducting; see
T
T
T
All information provided in this document is subject to legal disclaimers.
j
j
sp
sp
sp
sp
sp
sp
≥ 25 °C; T
≤ 150 °C; T
= 100 °C; Single device conducting;
= 25 °C; Single device conducting;
= 25 °C; t
= 25 °C; see
= 25 °C
= 25 °C; t
Figure 1
Figure
Rev. 04 — 27 April 2010
Simplified outline
1; see
j
p
p
≤ 150 °C
j
≥ 25 °C; R
≤ 100 µs; pulsed; Single
≤ 10 µs; pulsed
Figure 2
SOT96-1 (SO8)
Figure 3
8
1
Figure 3
GS
= 20 kΩ
5
4
Dual N-channel TrenchMOS logic level FET
Graphic symbol
Min
-
-
-12
-
-
-
-
-55
-55
-
-
PHKD6N02LT
D1
S1
D1
Typ
-
-
-
-
-
-
-
-
-
-
-
G1
© NXP B.V. 2010. All rights reserved.
D2
S2
150
Version
SOT96-1
Max
20
20
12
6.8
10.9
44
4.17
150
3.5
44
D2
mbk725
G2
Unit
V
V
V
A
A
A
W
°C
°C
A
A
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