PHD20N06T NXP Semiconductors, PHD20N06T Datasheet
PHD20N06T
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PHD20N06T Summary of contents
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... PHD20N06T N-channel TrenchMOS standard level FET Rev. 02 — 1 December 2009 1. Product profile 1.1 General description Standard level N-channel enhancement mode Field-Effect Transistor (FET plastic package using TrenchMOS technology. This product is designed and qualified for use in computing, communications, consumer and industrial applications only. ...
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... ° ° ≤ unclamped inductive load V sup Rev. 02 — 1 December 2009 PHD20N06T N-channel TrenchMOS standard level FET Graphic symbol mbb076 2 3 Version SOT428 Min Max - -20 ...
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... T (°C) mb Fig 2. Normalized total power dissipation as a function of mounting base temperature = DSon δ Rev. 02 — 1 December 2009 PHD20N06T N-channel TrenchMOS standard level FET 03aa16 0 50 100 150 T (°C) mb 003aaa043 = 10 μ 100 μ (V) VDS © ...
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... Transient thermal impedance from junction to mounting base as a function of pulse duration PHD20N06T_2 Product data sheet Conditions see Figure 4 minimum footprint; FR4 board −5 −4 − Rev. 02 — 1 December 2009 PHD20N06T N-channel TrenchMOS standard level FET Min Typ Max - - 2.9 - 71.4 - 003aaa053 δ ...
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... ° ° see Figure /dt = -100 A/µ - ° Rev. 02 — 1 December 2009 PHD20N06T N-channel TrenchMOS standard level FET Min Typ Max 4 0. ...
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... V (V) GS Fig 8. Forward transconductance as a function of drain current; typical values Rev. 02 — 1 December 2009 PHD20N06T N-channel TrenchMOS standard level FET 003aaa051 (V) GS 003aaa047 (A) D © NXP B.V. 2009. All rights reserved ...
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... Fig 10. Gate-source threshold voltage as a function of junction temperature 003aaa046 2 1.8 1.2 0.6 0 − (A) D Fig 12. Normalized drain-source on-state resistance factor as a function of junction temperature Rev. 02 — 1 December 2009 PHD20N06T 03aa32 max typ min 0 60 120 180 T (°C) j 03aa28 0 60 120 180 T (°C) j © ...
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... ° 0.5 1.0 1.5 Rev. 02 — 1 December 2009 PHD20N06T N-channel TrenchMOS standard level FET 003aaa048 Ciss Coss Crss −3 − (V) DS 003aaa052 2.0 V (V) SD © NXP B.V. 2009. All rights reserved. ...
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... min min 0.56 6.22 6.73 4.0 4.45 2.285 0.20 5.98 6.47 REFERENCES JEDEC JEITA TO-252 SC-63 Rev. 02 — 1 December 2009 PHD20N06T N-channel TrenchMOS standard level FET min 10.4 2.95 0.9 0.5 4.57 9.6 2.55 0.5 EUROPEAN ISSUE DATE PROJECTION 06-02-14 06-03-16 © NXP B.V. 2009. All rights reserved. ...
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... Legal texts have been adapted to the new company name where appropriate. PHD20N06T-01 20010222 (9397 750 07895) PHD20N06T_2 Product data sheet N-channel TrenchMOS standard level FET Data sheet status Change notice Product data sheet - Product specification - Rev. 02 — 1 December 2009 PHD20N06T Supersedes PHD20N06T-01 - © NXP B.V. 2009. All rights reserved ...
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... Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS— trademark of NXP B.V. to:salesaddresses@nxp.com Rev. 02 — 1 December 2009 PHD20N06T N-channel TrenchMOS standard level FET © NXP B.V. 2009. All rights reserved ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 1 December 2009 Document identifier: PHD20N06T_2 All rights reserved. ...