JN5148 NXP Semiconductors, JN5148 Datasheet - Page 69

• Manufacturer Part Number: JN5148
• Description: The JN5148 is an ultra low power, high performance MCU combined with an IEEE802
• Manufacturer: NXP Semiconductors

22.3.4 Two-wire Serial Interface
Note 1: This figure indicates the pulse width that is guaranteed to be suppressed. Pulse with widths up to 125nsec
may alos get suppressed.
© NXP Laboratories UK 2011
Clock period
Data setup time
Data hold time
Data invalid period
Select set-up period
Select hold period
Select asserted to output data driven
Select negated to data output tri-stated
SIF_CLK clock frequency
Hold time (repeated) START condition.
After this period, the first clock pulse is
generated
LOW period of the SIF_CLK clock
HIGH period of the SIF_CLK clock
Set-up time for repeated START condition
Data setup time SIF_D
Rise Time SIF_D and SIF_CLK
Fall Time SIF_D and SIF_CLK
Set-up time for STOP condition
Bus free time between a STOP and START
condition
Pulse width of spikes that will be
suppressed by input filters (Note 1)
Capacitive load for each bus line
Noise margin at the LOW level for each
connected device (including hysteresis)
Noise margin at the HIGH level for each
connected device (including hysteresis)
SIF_CLK
SIF_D
t
F
S
Parameter
Parameter
t
HD;STA
t
LOW
Figure 50: Two-wire Serial Interface Timing
t
R
t
HD;DAT
JN-DS-JN5148-001 1v7
t
HIGH
t
Symbol
SU;DAT
Symbol
t
t
t
t
HD:STA
SU:STA
SU:DAT
SU:STO
t
t
f
t
V
HIGH
LOW
t
V
BUF
C
t
SCL
t
t
SP
t
F
t
R
t
t
t
F
nh
t
t
sss
ssh
t
nl
b
ck
vo
hz
si
hi
lz
t
SU;STA
0.1VDD
0.2VDD
Standard Mode
0.25
Min
Sr
4.7
4.7
4.7
0
4
4
4
-
-
-
-
125.0
t
HD;STA
Min
15
15
15
15
-
1000
Max
100
300
400
60
-
-
-
-
-
-
-
-
-
20+0.1Cb
20+0.1Cb
0.1VDD
0.2VDD
t
SP
Min
0.6
1.3
0.6
0.6
0.1
0.6
1.3
0
Fast Mode
-
-
Max
t
40
20
20
SU;STO
-
-
-
-
t
R
P
Max
400
300
300
400
60
-
-
-
-
-
-
-
-
-
t
BUF
Unit
ns
ns
ns
ns
ns
ns
ns
ns
S
Unit
kHz
pF
µs
µs
µs
µs
µs
ns
ns
µs
µs
ns
V
V
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