MPT612 NXP Semiconductors, MPT612 Datasheet - Page 13
![The MPT612, the first dedicated IC for performing the Maximum Power Point Tracking (MPPT) function, is designed for use in applications that use solar photovoltaic (PV) cells or in fuel cells](/photos/41/52/415288/sot313-2_3d_sml.gif)
MPT612
Manufacturer Part Number
MPT612
Description
The MPT612, the first dedicated IC for performing the Maximum Power Point Tracking (MPPT) function, is designed for use in applications that use solar photovoltaic (PV) cells or in fuel cells
Manufacturer
NXP Semiconductors
Datasheet
1.MPT612.pdf
(37 pages)
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MPT612
Product data sheet
7.11 SPI serial I/O controller
7.12 SSP serial I/O controller
7.13 General purpose 32-bit timers/external event counters
The MPT612 contains one SPI I/O controller. SPI is a full duplex serial peripheral
interface, designed to handle multiple masters and slaves connected to a given bus. Only
a single master and a single slave can communicate on the interface during a given data
transfer. During a data transfer the master and slave always send 8 bits to 16 bits of data
to each other. The controller provides the following features:
The MPT612 contains one SSP. The SSP controller is capable of operation on using
SPI, a 4-wire SSI or Microwire bus. It can interact with multiple masters and slaves on
the bus. However, only a single master and a single slave can communicate on the bus
during a given data transfer. The SSP supports full duplex transfers, with data frames of
4 bits to 16 bits flowing from the master to the slave and from the slave to the master.
Often only one of these data streams carries meaningful data. The controller provides the
following features:
The Timer/Counter is designed to count cycles of:
It includes four capture inputs to trap the timer value when input signals transition which
can optionally generate an interrupt.
Multiple pins can be selected to perform a single capture or match function, for example
to provide an application with logical OR, AND and ‘broadcast’ functions.
• Multi-master bus (no central master)
• Arbitration between simultaneously transmitting masters without corruption of serial
• Serial clock synchronization allows devices with different bit rates to communicate
• Serial clock synchronization can be used as a handshake mechanism to suspend
• The I
• Compliant with SPI specification
• Synchronous, Serial, Full Duplex, Communication
• SPI Master only
• Maximum data bit rate of one eighth of the input clock rate
• Compatible with Motorola SPI, Texas Instruments 4-wire SSI and National
• Synchronous serial communication
• Master or slave operation
• 8-frame FIFOs for both transmit and receive
• Four bits to 16 bits per frame
• the Peripheral CLocK (PCLK)
• an externally supplied clock and optionally generate interrupts
• perform other actions at specified timer values, based on four match registers.
data on the bus
using one serial bus
and resume serial transfer
Semiconductor’s Microwire buses
2
C-bus can also be used for test and diagnostic purposes
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 14 September 2010
Maximum power point tracking IC
© NXP B.V. 2010. All rights reserved.
MPT612
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