P89LPC9321 NXP Semiconductors, P89LPC9321 Datasheet - Page 48

• Manufacturer Part Number: P89LPC9321
• Description: The P89LPC9321 is a single-chip microcontroller, available in low cost packages, basedon a high performance processor architecture that executes instructions in two to fourclocks, six times the rate of standard 80C51 devices
• Manufacturer: NXP Semiconductors

NXP Semiconductors
P89LPC9321
Product data sheet
7.30.10 Hardware activation of the boot loader
7.30.8 ISP
7.30.9 Power-on reset code execution
7.31 User configuration bytes
ISP is performed without removing the microcontroller from the system. The ISP facility
consists of a series of internal hardware resources coupled with internal firmware to
facilitate remote programming of the P89LPC9321 through the serial port. This firmware is
provided by NXP and embedded within each P89LPC9321 device. The NXP ISP facility
has made in-system programming in an embedded application possible with a minimum
of additional expense in components and circuit board area. The ISP function uses five
pins (V
interface your application to an external circuit in order to use this feature.
The P89LPC9321 contains two special flash elements: the Boot Vector and the Boot
Status bit. Following reset, the P89LPC9321 examines the contents of the Boot Status bit.
If the Boot Status bit is set to zero, power-up execution starts at location 0000H, which is
the normal start address of the user’s application code. When the Boot Status bit is set to
a value other than zero, the contents of the Boot Vector are used as the high byte of the
execution address and the low byte is set to 00H.
Table 8
boot loader is pre-programmed into the address space indicated and uses the indicated
boot loader entry point to perform ISP functions. This code can be erased by the user.
Remark: Users who wish to use this loader should take precautions to avoid erasing the
1 kB sector that contains this boot loader. Instead, the page erase function can be used to
erase the first eight 64-byte pages located in this sector.
A custom boot loader can be written with the Boot Vector set to the custom boot loader, if
desired.
Table 8.
The boot loader can also be executed by forcing the device into ISP mode during a
power-on sequence (see the P89LPC9321 User manual for specific information). This has
the same effect as having a non-zero status byte. This allows an application to be built
that will normally execute user code but can be manually forced into ISP operation. If the
factory default setting for the boot vector (1FH) is changed, it will no longer point to the
factory pre-programmed ISP boot loader code. After programming the flash, the status
byte should be programmed to zero in order to allow execution of the user’s application
code beginning at address 0000H.
Some user-configurable features of the P89LPC9321 must be defined at power-up and
therefore cannot be set by the program after start of execution. These features are
configured through the use of the flash byte UCFG1 and UCFG2. Please see the
P89LPC9321 User’s Manual for additional details.
Device
P89LPC9321
DD
shows the factory default Boot Vector setting for these devices. A factory-provided
, V
Default boot vector values and ISP entry points
SS
, TXD, RXD, and RST). Only a small connector needs to be available to
All information provided in this document is subject to legal disclaimers.
Default
boot vector
1FH
Rev. 2 — 16 November 2010
8-bit microcontroller with accelerated two-clock 80C51 core
Default
boot loader
entry point
1F00H
Default boot loader
code range
1E00H to 1FFFH
P89LPC9321
© NXP B.V. 2010. All rights reserved.
1 kB sector
range
1C00H to 1FFFH
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