P89LPC9321 NXP Semiconductors, P89LPC9321 Datasheet - Page 21

• Manufacturer Part Number: P89LPC9321
• Description: The P89LPC9321 is a single-chip microcontroller, available in low cost packages, basedon a high performance processor architecture that executes instructions in two to fourclocks, six times the rate of standard 80C51 devices
• Manufacturer: NXP Semiconductors

NXP Semiconductors
P89LPC9321
Product data sheet
7.3.1 Clock definitions
7.3.2 CPU clock (OSCCLK)
7.4.1 Low speed oscillator option
7.4.2 Medium speed oscillator option
7.4.3 High speed oscillator option
7.2 Enhanced CPU
7.3 Clocks
7.4 External crystal oscillator option
The P89LPC9321 uses an enhanced 80C51 CPU which runs at six times the speed of
standard 80C51 devices. A machine cycle consists of two CPU clock cycles, and most
instructions execute in one or two machine cycles.
The P89LPC9321 device has several internal clocks as defined below:
OSCCLK — Input to the DIVM clock divider. OSCCLK is selected from one of four clock
sources (see
Section 7.11 “CCLK modification: DIVM
Remark: f
CCLK — CPU clock; output of the clock divider. There are two CCLK cycles per machine
cycle, and most instructions are executed in one to two machine cycles (two or four CCLK
cycles).
RCCLK — The internal 7.373 MHz RC oscillator output. The clock doubler option, when
enabled, provides an output frequency of 14.746 MHz.
PCLK — Clock for the various peripheral devices and is
The P89LPC9321 provides several user-selectable oscillator options in generating the
CPU clock. This allows optimization for a range of needs from high precision to lowest
possible cost. These options are configured when the flash is programmed and include an
on-chip watchdog oscillator, an on-chip RC oscillator, an oscillator using an external
crystal, or an external clock source.
The external crystal oscillator can be optimized for low, medium, or high frequency
crystals covering a range from 20 kHz to 18 MHz. It can be the clock source of OSCCLK
and RTC. Low speed oscillator option can be the clock source of WDT.
This option supports an external crystal in the range of 20 kHz to 100 kHz. Ceramic
resonators are also supported in this configuration.
This option supports an external crystal in the range of 100 kHz to 4 MHz. Ceramic
resonators are also supported in this configuration.
This option supports an external crystal in the range of 4 MHz to 18 MHz. Ceramic
resonators are also supported in this configuration.
osc
Figure
is defined as the OSCCLK frequency.
All information provided in this document is subject to legal disclaimers.
6) and can also be optionally divided to a slower frequency (see
Rev. 2 — 16 November 2010
8-bit microcontroller with accelerated two-clock 80C51 core
register”).
CCLK
⁄
2
P89LPC9321
.
© NXP B.V. 2010. All rights reserved.
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