LPC3180 NXP Semiconductors, LPC3180 Datasheet - Page 23

• Manufacturer Part Number: LPC3180
• Description: The LPC3180 is an ARM9-based microcontroller for embedded applications requiringhigh performance combined with low power dissipation
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC3180_2
Preliminary data sheet
6.19.1 Features
6.20.1 Features
6.19 Millisecond timer
6.20 Watchdog timer
The millisecond timer is clocked by 32 kHz RTC clock, so a prescaler is not needed to
obtain a lower count rate.
The millisecond timer includes three match registers that are compared to the
Timer/Counter value. A match can generate an interrupt and the cause the Timer/Counter
either continue to run, stop, or be reset.
The watchdog timer block is clocked by the main peripheral clock, which clocks a 32-bit
counter. A match register is compared to the Timer. When configured for watchdog
functionality, a match drives the match output low. The match output is gated with an
enable signal that gives the opportunity to generate two type of reset signal: one that only
resets chip internally, and another that goes through a programmable pulse generator
before it goes to the external pin RESOUT_N and to the internal chip reset.
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Counter or Timer operation.
Two 32-bit capture registers.
Three 32-bit match registers that allow:
– Continuous operation with optional interrupt generation on match.
– Stop timer on match with optional interrupt generation.
– Reset timer on match with optional interrupt generation.
Pause control to stop counting when core is in debug state.
32-bit Timer/Counter, running from the 32 kHz RTC clock.
Counter or Timer operation.
Three 32-bit match registers that allow:
– Continuous operation with optional interrupt generation on match.
– Stop timer on match with optional interrupt generation.
– Reset timer on match with optional interrupt generation.
Pause control to stop counting when core is in debug state.
Programmable 32-bit timer.
Internally resets the device if not periodically reloaded.
Flag to indicate that a watchdog reset has occurred.
Programmable watchdog pulse output on RESOUT_N pin.
Can be used as a standard timer if watchdog is not used.
Pause control to stop counting when core is in debug state.
Rev. 02 — 15 February 2007
16/32-bit ARM microcontroller with external memory interface
LPC3180
© NXP B.V. 2007. All rights reserved.
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