LPC2478 NXP Semiconductors, LPC2478 Datasheet - Page 26

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LPC2478

Manufacturer Part Number
LPC2478
Description
NXP Semiconductors designed the LPC2478 microcontroller, powered by theARM7TDMI-S core, to be a highly integrated microcontroller for a wide range ofapplications that require advanced communications and high quality graphic displays
Manufacturer
NXP Semiconductors
Datasheet

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Table 4.
[1]
[2]
[3]
[4]
LPC2478
Product data sheet
Symbol
RESET
XTAL1
XTAL2
RTCX1
RTCX2
V
V
V
V
n.c.
V
V
VREF
VBAT
SSIO
SSCORE
SSA
DD(3V3)
DD(DCDC)(3V3)
DDA
5 V tolerant pad providing digital I/O functions with TTL levels and hysteresis.
5 V tolerant pad providing digital I/O functions (with TTL levels and hysteresis) and analog input. When configured as a ADC input,
digital section of the pad is disabled.
5 V tolerant pad providing digital I/O with TTL levels and hysteresis and analog output function. When configured as the DAC output,
digital section of the pad is disabled.
Open-drain 5 V tolerant digital I/O pad, compatible with I
functionality. When power is switched off, this pin connected to the I
configuration applies to all functions on this pin.
Pin description
Pin
35
44
46
34
36
33, 63,
77, 93,
114,
133,
148,
169,
189,
200
32, 84,
172
22
15, 60,
71, 89,
112,
125,
146,
165,
181,
198
30, 117,
141
26, 86,
174
20
24
38
[7]
[8][9]
[8][9]
[8][10]
[8][10]
[12]
[16]
[16]
[16]
[11]
[11]
[13]
[14]
[15]
…continued
Ball
M2
M4
N4
K2
L2
L3, T5,
R9, P12,
N16,
H14,
E15,
A12, B6,
A2
K4, P10,
D12
J2
G3, P6,
P8, U13,
P17,
K16,
C17,
B13, C9,
D7
G14
H4, P11,
D11
G4
K1
M3
J4, L14,
[12]
[8][10]
[8][10]
[11]
[16]
[8][9]
[13]
[16]
[7]
[8][9]
[16]
[15]
[11]
[14]
All information provided in this document is subject to legal disclaimers.
Type
I
I
O
I
O
I
I
I
I
I
I
I
I
I
Rev. 3 — 12 September 2011
Description
external reset input: A LOW on this pin resets the device, causing I/O
ports and peripherals to take on their default states, and processor
execution to begin at address 0. TTL with hysteresis, 5 V tolerant.
Input to the oscillator circuit and internal clock generator circuits.
Output from the oscillator amplifier.
Input to the RTC oscillator circuit.
Output from the RTC oscillator circuit.
ground: 0 V reference for the digital IO pins.
ground: 0 V reference for the core.
analog ground: 0 V reference. This should nominally be the same
voltage as V
error.
3.3 V supply voltage: This is the power supply voltage for the I/O ports.
not connected pins: These pins must be left unconnected (floating).
3.3 V DC-to-DC converter supply voltage: This is the power supply for
the on-chip DC-to-DC converter.
analog 3.3 V pad supply voltage: This should be nominally the same
voltage as V
This voltage is used to power the ADC and DAC.
ADC reference: This should be nominally the same voltage as V
but should be isolated to minimize noise and error. The level on this pin is
used as a reference for ADC and DAC.
RTC power supply: 3.3 V on this pin supplies the power to the RTC
peripheral.
2
C-bus 400 kHz specification. It requires an external pull-up to provide output
SSIO
DD(3V3)
2
C-bus is floating and does not disturb the I
/V
SSCORE
but should be isolated to minimize noise and error.
, but should be isolated to minimize noise and
Single-chip 16-bit/32-bit microcontroller
2
LPC2478
C lines. Open-drain
© NXP B.V. 2011. All rights reserved.
DD(3V3)
26 of 93

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