LPC2470 NXP Semiconductors, LPC2470 Datasheet - Page 37

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LPC2470

Manufacturer Part Number
LPC2470
Description
NXP Semiconductors designed the LPC2470 microcontroller, powered by theARM7TDMI-S core, to be a highly integrated microcontroller for a wide range ofapplications that require advanced communications and high quality graphic displays
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
LPC2470
Product data sheet
7.16.1 Features
7.17.1 Features
7.18.1 Features
7.16 SPI serial I/O controller
7.17 SSP serial I/O controller
7.18 SD/MMC card interface
The LPC2470 contains one SPI controller. SPI is a full duplex serial interface designed to
handle multiple masters and slaves connected to a given bus. Only a single master and a
single slave can communicate on the interface during a given data transfer. During a data
transfer the master always sends 8 bits to 16 bits of data to the slave, and the slave
always sends 8 bits to 16 bits of data to the master.
The LPC2470 contains two SSP controllers. The SSP controller is capable of operation on
a SPI, 4-wire SSI, or Microwire bus. It can interact with multiple masters and slaves on the
bus. Only a single master and a single slave can communicate on the bus during a given
data transfer. The SSP supports full duplex transfers, with frames of 4 bits to 16 bits of
data flowing from the master to the slave and from the slave to the master. In practice,
often only one of these data flows carries meaningful data.
The Secure Digital and Multimedia Card Interface (MCI) allows access to external SD
memory cards. The SD card interface conforms to the SD Multimedia Card Specification
Version 2.11.
UART3 includes an IrDA mode to support infrared communication.
Compliant with SPI specification
Synchronous, Serial, Full Duplex Communication
Combined SPI master and slave
Maximum data bit rate of one eighth of the input clock rate
8 bits to 16 bits per transfer
Compatible with Motorola SPI, 4-wire TI SSI, and National Semiconductor Microwire
buses
Synchronous serial communication
Master or slave operation
8-frame FIFOs for both transmit and receive
4-bit to 16-bit frame
Maximum SPI bus data bit rate of one half (Master mode) and one twelfth (Slave
mode) of the input clock rate
DMA transfers supported by GPDMA
The MCI provides all functions specific to the SD/MMC memory card. These include
the clock generation unit, power management control, and command and data
transfer.
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 8 September 2011
Flashless 16-bit/32-bit microcontroller
LPC2470
© NXP B.V. 2011. All rights reserved.
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