TDA7333013TR STMicroelectronics, TDA7333013TR Datasheet - Page 19

• Manufacturer Part Number: TDA7333013TR
• Description: IC PROCESSOR RDS/RBDS 16-TSSOP
• Manufacturer: STMicroelectronics
• Type: RDS/RBDS Signal Processorr

Specifications of TDA7333013TR

• Applications: Radio
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TDA7333
3.8
3.8.1
I
This interface consists of three lines: a serial data line (SDA), a bit clock (SCL), and a slave
address select (SA).
The interface is capable of operating in fast mode (up to 400kbits/s) but also at lower rates
(<100kbits/s).
Data transfers follow the format shown in
address is sent. The address is 7 bits long followed by an eighth bit which is a data direction
bit (R/_W).
A ’zero’ indicates a transmission (WRITE), a ’one’ indicates a request for data (READ).
The slave address of the chip is set to 001000S, where S is the least significant bit of the
slave address set externally via the pin SA_DATAOUT. This allows to choose between two
addresses in case of conflict with another device of the radio set.
Each byte has to be followed by an acknowledge bit (SDA low).
Data is transferred with the most significant (MSB) bit first.
A data transfer is always terminated by a stop condition (P) generated by the master.
Figure 15. I
Write transfer
Figure 16. I
Figure 17. I
2
C transfer mode
CSN
SDA
SCL
SA
CONDITION
SDA
0
1
SCL
START
S
S
CONDITION
START
S lave address
S
2
2
2
from master to slave
from slave to master
C data transfer
C write transfer
C write operation example: write of rds_int and rds_bd_ctrl registers
SLAVE ADDRESS
ADDRESS
1-7
W
R/W
8
W
A
ACK
ACK
rds_int
9
rds_int[7:0]
1-7
A = acknowledge bit
S = start condition
W = write mode
Slave address = 001000S ( where S is the level of the pin
P = stop condition
A
Figure
DATA
r ds_ b d_c trl
8
15. After the START condition (S), a slave
ACK
A
9
ACK
sinc4reg
SA_DATAOUT)
1-7
rds_bd_ctrl[7:0]
DATA
A
Functional description
8
testreg
ACK/ACK
9
A
ACK
CONDITION
STOP
P
P
CONDITION
STOP
P
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