IRS20124SPBF International Rectifier, IRS20124SPBF Datasheet - Page 23

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IRS20124SPBF

Manufacturer Part Number
IRS20124SPBF
Description
IC DIGITAL AUDIO DRIVER 14-SOIC
Manufacturer
International Rectifier
Type
MOSFET Driverr
Datasheet

Specifications of IRS20124SPBF

Applications
Amplifiers, Receivers
Mounting Type
Surface Mount
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Current, Output
1
Current, Output, High Level
1 A
Current, Output, Low Level
1.2 A
Delay, Propagation, Turn-off
80 ns
Delay, Propagation, Turn-on
80 ns
Driver Type
Audio
Package
14-Lead SOIC
Package Type
14-Lead SOIC
Temperature, Operating
–40 to +124 °C
Thermal Resistance Junction/ambient
100 °C/W
Thermal Resistance, Junction To Ambient
100 °C/W
Time, Fall, Turn-off
35 ns
Time, Rise, Turn-on
40 ns
Time, Turn-off Delay
80 ns
Time, Turn-on
80 ns
Time, Turn-on Delay
80 ns
Voltage, Output, High Level
1.2 V
Voltage, Output, Low Level
0.1 V
Voltage, Supply
200 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IRS20124SPBF
Manufacturer:
NPC
Quantity:
4 013
Part Number:
IRS20124SPBF
Manufacturer:
IR
Quantity:
20 000
How to set OC Threshold
The positive and negative trip thresholds for bi-
directional current sensing are set by the voltages
at OC
The trip threshold voltages, V
determined by the required trip current levels, I
I
Since the sensed voltage of V
2.21 V internally and compared with the voltages
fed to the OC
value of OC
V
The same relation holds between OC
V
In general, R
efficient that needs to be considered when the
threshold level is being set. Please also note that,
www.irf.com
TRIP-
External Resistor Network to Set OC Threshold
OCSET1
OCSET2
, and R
>0.5mA
SET1
= V
= V
and OC
SOC+
SOC-
DS(ON)
SET1
DS(ON)
SET1
+ 2.21 V = I x R
R3
R4
R5
with respect to COM is
+ 2.21 V = I x R
in the low side MOSFET.
SET2
has a positive temperature co-
and OC
.
Vcc
OC
OC
COM
SET2
SET1
SET2
SOC+
pins, the required
s
DS(ON)
DS(ON)
is shifted up by
and V
SET2
+ 2.21 V
and V
+ 2.21 V
SOC+,
SOC-,
TRIP+
are
in the negative load current direction, the sensing
voltage at the V
ode of the low side MOSFET as explained later.
Design Example
This example demonstrates how to use the exter-
nal resistor network to set I
±11 A, using a MOSFET that has R
V
V
The total resistance of resistor network is based
on the voltage at the V cc and required bias cur-
rent in this resistor network.
R
The expected voltage across R3 is Vcc- V
= 12 V - 2.87 V=9.13 V. Similarly, the voltages
across R4 is V
=1.32 V, and the voltage across R5 is V
V respectively.
R3 =9.13 V/ I
R4 =1.32 V/ I
R5 =1.55 V/ I
Choose R3 9.09 k R4=1.33 k , R5=1.54 k
from E-96 series.
Consequently, actual threshold levels are
V
V
Resisters with 1% tolerances are recommended.
ISET1
ISET2
total
SOC+
SOC-
x 60
=R3 + R4 + R5 = Vcc / I
= V
= V
V
=1.55 V gives I
=2.88 V gives I
12 V
TH
TH-
+ + 2.21 V = I
+ 2.21 V = I
bias
bias
bias
2.21 V = 2.87 V
SOC+
s
IRS20124S(PbF)
node is limited by the body di-
2.21 V = 1.55 V
9.13k
1.32k
1.55k
- V
TRIP-
TRIP+
12 k
SOC-
TRIP-
= -11.0 A
TRIP+
= 11.2 A
TRIP+
x R
bias
= 2.87 V - 1.55 V
x R
DS(ON)
and I
DS(ON)
DS(ON)
TRIP-
ISET2
2.21 V
=6
2.21V
= 1.55
to be
ISET1
23

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