BU9253AS Rohm Semiconductor, BU9253AS Datasheet - Page 12
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BU9253AS
Manufacturer Part Number
BU9253AS
Description
IC KARAOKE ECHO SGL CHIP SDIP18
Manufacturer
Rohm Semiconductor
Type
Echo ICr
Datasheet
1.BU9253AS.pdf
(17 pages)
Specifications of BU9253AS
Applications
Karaoke
Mounting Type
Through Hole
Package / Case
18-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
BU9253AS
Manufacturer:
ROHM/罗姆
Quantity:
20 000
●Description of external components
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Echo level setting method
Clock frequency and delay time
LPF frequency characteristic
A/D, D/A external capacitors C3, C6
Mute
Maximum signal input
Echo level
When the original signal is defined as 1, the echo signal level becomes the feedback ratio.
Echo signal level is determined by the gains of A/D side operation amplifier and the D/A operation amplifier, since there
is no gain in A/D → SRAM → D/A. Path in applied circuit example,
Echo level can be set by adjusting DC voltage by VR1. It does not change in low voltage range, therefore, R8 is added,
and it can be adjusted by VR pot.
Clock frequency and delay time are as the following equations.
As an example, when clock frequency is 375kHz, then sample frequency is 375kHz ÷ 6 = 62.5kHz. Therefore, the delay
time is:
Clock frequency is determined by R2, C1 connected to CR terminal (pin 18 in BU9253AS, pin 16 in BU9253FS). When
C, R are changed, oscillation frequency changes, but the delay time is kept fixed.
When the band width is set too narrow, echo voice becomes worse, and when band width is set wide, A/D cannot be
converted, and S/N becomes worse. Band width of applied circuit example is 2kHz.
Can be controlled by input voltage of MUTE pin. It takes more than one SRAM cycle for switching between mute → mute
release (L → M → H). It is necessary for initializing SRAM and insuring stable status before changing operating modes.
MIX OUT output is muted, so original sound and echo sound output is stopped.
In the applied circuit example, MUTE is set by R3, C2. In the specifications, voltage range of M is 1.6V ~ 2.8V, therefore,
it is necessary to change R3,C2, and set the time of 1.6V ~ 2.8V over 131ms. In consideration of fluctuation, C2 = 22uF,
R3 = 22kΩ. When MUTE pin is controlled by the microcontroller, select M range to 1.6V ~ 2.8V and keep M level over
131ms.
When original signal and echo are in phase and mixed, both the signals are added to reach maximum output. In order
not to clip this signal, the maximum output at power source voltage of 5V is about 4Vpp. When echo feedback ratio is
0.75, then maximum signal input becomes about 1.0Vpp.
Feedback is set by resistance and capacitor so that output follows even when input signal level and frequency of
A/D, D/A change. Variation in the externally attached capacitor can influence the sound quality. A small capacitor can
generate noise, while a capacitor that is too large will attenuate. In applied circuit example, 0.01uF is selected to avoid
influence upon LPF.
< BU9253AS/FS >
Gain at A/D side : R4 ÷ R5 = 10K ÷ 20K = 0.5
Gain at D/A side : R11 ÷ R9 = 15K ÷ 10K = 1.5
Echo signal feed back ration = 0.5 x 1.5 = 0.75 = 75%
Sample frequency = clock frequency ÷ 6
Delay time = (1 ÷ sample frequency) x 8192 (SRAM 8192 bits)
Delay time = (1 ÷ 62500) x 8192 = 131ms
Vout MAX=1/(1-A)×Vin
MUTE pin
(Refer to Fig. 27.)
M
H
L
=1/(1-0.75)×Vin=4Vpp
∴Vin=1Vpp
Mute release (operating)
Clock stop & mute
12/16
Mode
Mute