ADUC7023 Analog Devices, ADUC7023 Datasheet - Page 7

• Manufacturer Part Number: ADUC7023
• Description: Precision Analog Microcontroller, 12-Bit Analog I/O, ARM7TDMI MCU
• Manufacturer: Analog Devices

Specifications of ADUC7023

• Mcu Core: ARM7 TDMI
• Mcu Speed (mips): 40
• Sram (bytes): 8192Bytes
• Gpio Pins: 20
• Adc # Channels: 12
• Other: PWM

Parameter
INTERNAL OSCILLATOR
MCU CLOCK RATE
START-UP TIME
PROGRAMMABLE LOGIC ARRAY (PLA)
POWER REQUIREMENTS
ESD TESTS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
All ADC channel specifications are guaranteed during normal microcontroller core operation.
Apply to all ADC input channels.
Measured using the factory-set default values in the ADC offset register (ADCOF) and gain coefficient register (ADCGN).
Not production tested but supported by design and/or characterization data on production release.
Measured using the factory-set default values in ADCOF and ADCGN with an external
system components, the user may need to execute a system calibration to remove external endpoint errors and achieve these specifications (see the Calibration section).
The input signal can be centered on any dc common-mode voltage (V
DAC linearity is calculated using a reduced code range of 100 to 3995.
DAC gain error is calculated using a reduced code range of 100 to internal 2.5 V V
DAC linearity is calculated using a reduced code range of 100 to 3995.
3.6 V supply, and sleep mode with 3.6 V supply.
DAC gain error is calculated using a reduced code range of 100 to internal 2.5 V V
Endurance is qualified as per JEDEC Standard 22 Method A117 and measured at −40°C, +25°C, +85°C, and +125°C.
Retention lifetime equivalent at junction temperature (T
Test carried out with a maximum of eight I/Os set to a low output level.
Power supply current consumption is measured in normal, pause, and sleep modes under the following conditions: normal mode with 3.6 V supply, pause mode with
IOV
From 32 kHz Internal Oscillator
From 32 kHz External Crystal
Using an External Clock
At Power-On
From Pause/Nap Mode
From Sleep Mode
From Stop Mode
Pin Propagation Delay
Element Propagation Delay
Power Supply Voltage Range
Analog Power Supply Currents
Digital Power Supply Current
Additional Power Supply Currents
HBM Passed
FICDM Passed
DD
AV
IOV
IOV
IOV
ADC
DAC
AV
power supply current decreases typically by 2 mA during a Flash/EE erase cycle.
DD
DD
DD
DD
DD
to AGND and IOV
Current
Current in Normal Mode
Current in Pause Mode
Current in Sleep Mode
14 , 15
DD
to DGND
Min
0.05
0.05
2.7
J
) = 85°C as per JEDEC Standard 22 Method A117. Retention lifetime derates with junction temperature.
32.768
326
41.78
66
24
3.07
1.58
1.7
12
2.5
200
8.5
11
28
14
230
1.4
0.7
400
Typ
CM
) as long as this value is within the ADC voltage input range specified.
Rev. B | Page 7 of 96
Max
±3
44
41.78
3.6
10
15
35
20
650
3
1.0
REF
REF
AD845
.
.
op amp as an input buffer stage as shown in Figure 28. Based on external ADC
Unit
kHz
%
kHz
MHz
MHz
MHz
ms
ns
μs
ms
ms
ns
ns
V
μA
mA
mA
mA
mA
μA
mA
mA
μA
kV
kV
Test Conditions/Comments
CD = 7
CD = 0
T
T
Core clock = 41.78 MHz
CD = 0
CD = 7
From input pin to output pin
ADC in idle mode
Code executing from Flash/EE
CD = 7
CD = 3
CD = 0 (41.78 MHz clock)
CD = 0 (41.78 MHz clock)
T
At 1 MSPS
At 62.5 kSPS
Per DAC
2.5 V reference, T
A
A
A
= 85°C
= 125°C
= 125°C
A
= 25°C
ADuC7023