AD5544 Analog Devices, AD5544 Datasheet - Page 17

• Manufacturer Part Number: AD5544
• Description: Quad, Current-Output, Serial-Input 16-/14-Bit DACs
• Manufacturer: Analog Devices

Specifications of AD5544

• Resolution (bits): 16bit
• Dac Update Rate: 500kSPS
• Dac Settling Time: 0.9µs
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Current Out
• Dac Input Format: Ser,SPI

Data Sheet
POWER-ON RESET
When the V
forces all the input and DAC registers to the zero-code state or
half-scale state, depending on the MSB pin voltage. The V
supply should have a smooth positive ramp without drooping to
have consistent results, especially in the region of V
2.3 V. The V
ance. The DAC register data stays at a zero-scale or half-scale
setting until a valid serial register data load takes place.
SDO
CLK
SDI
CS
Figure 24.
DD
SS
SDO
CLK
SDI
CS
supply has no effect on the power-on reset perform-
power supply is turned on, an internal reset strobe
AD5544/AD5554
EN
D10
D11
D12
D13
D14
D15
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
A0
A1
EN
DECODE
DGND
16
DAC A
Equivalent Logic Interface
2:4
B
C
D
SHIFT REGISTER
TO INPUT REGISTER
DECODER
ADDRESS
POWER-
RESET
ON
19
TH
CLOCK
/17
DD
Figure 23. System Level Digital Interfacing
TH
= 1.5 V to
A
B
C
D
DD
power
Rev. F | Page 17 of 28
REGISTER R
REGISTER R
REGISTER R
REGISTER R
MSB
MSB
SET
INPUT
INPUT
INPUT
INPUT
ESD PROTECTION CIRCUITS
All logic input pins contain back-biased ESD protection Zener
diodes that are connected to ground (DGND) and V
shown in Figure 25.
POWER SUPPLY SEQUENCE
As standard practice, it is recommended that V
be powered up prior to any reference. The ideal power-up sequence
is as follows: A
A noncompliance power-up sequence may elevate the reference
current, but the devices resume normal operation once V
V
AD5544
SS
are powered up.
LDAC
REGISTER R
REGISTER R
REGISTER R
REGISTER R
MSB
SET
DAC A
DAC B
DAC C
DAC D
Figure 25. Equivalent ESD Production Circuits
GND
x, DGND, V
DIGITAL
INPUTS
V
RS
V
DD
REF
A B C D
5kΩ
DD
DAC A
DAC B
DAC C
DAC D
DGND
, V
V
SS
SS
, V
REF
AD5544/AD5554
x, and the digital inputs.
V
R
I
A
R
I
A
R
I
A
R
I
A
A
OUT
OUT
OUT
OUT
DD
DD
FB
GND
FB
GND
FB
GND
FB
GND
GND
A
B
C
D
, V
A
B
C
D
A
B
C
D
F
SS
, and ground
DD
, as
DD
and