AD5544 Analog Devices, AD5544 Datasheet
AD5544
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AD5544 Summary of contents
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... Data Sheet FEATURES AD5544: 16-bit resolution INL of ±1 LSB (B Grade) AD5554: 14-bit resolution INL of ±0.5 LSB (B Grade full-scale current ± 20%, with V REF 0.9 µs settling time to ±0.1% 12 MHz multiplying bandwidth Midscale glitch of −1 nV-sec Midscale or zero-scale reset 4 separate, 4-quadrant multiplying reference inputs ...
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... Added Figure 6, Renumbered Subsequent Figures, Changes to Table 4 ............................................................................................ 7 Changed Applications Section to Applications Information Section, Added Reference Selection and Amplifier Selection Sections ............................................................................................ 19 Added Evaluation Board for the AD5544 Section ..................... 21 Updated Outline Dimensions ....................................................... 17 Changes to Ordering Guide .......................................................... 18 9/09—Rev Rev. D Changes to Features Section............................................................ 1 Changes to Table 1 ............................................................................ 3 Changes to Table 2 ...
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... GND REF REF REF Test Condition/Comments 16 1 LSB = V x/2 = 153 µV when REF REF AD5544BRSZ AD5544ARSZ AD5544BCPZ AD5544ACPZ-1 AD5544BRSZ AD5544ARSZ AD5544BCPZ AD5544ACPZ-1 Data = 0x0000 25°C A Data = 0x0000 85°C A Data = 0xFFFF Channel-to-channel Data = 0xFFFF Code dependent I = 1.6 mA ...
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... Channel-to-channel Data = 0x3FFF Code dependent 100 µA OH Rev Page Min Typ 0.9 = 2.0 pF −1 −65 −90 0.6 −98 7 OP177 I-to-V converter amplifier. The AD5544 full operating temperature REF REF A Min Typ REF ± − 1.25 80 2.4 ...
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... REF f = 100 kHz MHz CLK p-p, data = 0x3FFF kHz REF kHz 2.5 ns (10 and timed from a voltage level of 1 AD8038 I-to-V converter amplifier,. Rev Page AD5544/AD5554 Min Typ 2.7 0.001 0 − ...
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... CLK t CS CSS LDAC D15 D14 D13 D12 D11 D10 SDO Figure 3. AD5544 Timing Diagram D13 D12 D11 D10 D09 D08 SDO Figure 4. AD5554 Timing Diagram Rev Page Data Sheet ...
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... affect device reliability. −0 0 −0.3 V, +0.3 V ±50 mA ESD CAUTION (T max − T )/θ θ JA 100°C/W 32.5°C/W 150°C −40°C to +125°C −65°C to +150°C 215°C 220°C Rev Page AD5544/AD5554 ...
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... AD5544 and 17 clock pulses for the Rev Page Data Sheet DGND GND OUT GND REF AD5544 LDAC 4 FB TOP VIEW MSB 5 20 SDO (Not to Scale ...
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... DAC D Reference Voltage Input Terminal. Establishes DAC D full-scale output voltage. This pin can be REF tied to the DAC D Current Output. OUT DAC D Analog Ground. GND N not connect. N not connect. N not connect. N not connect. N/A 33 EPAD Connect the exposed pad to AGNDx. pin. DD Rev Page AD5544/AD5554 ...
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... OP AMP OFFSET (µV) AD5544 Differential Nonlinearity Error vs. Op Amp Offset –5 –10 –15 –20 –1500 –1000 –500 0 500 OP AMP OFFSET (µV) Figure 12. AD5544 Gain Error vs. Op Amp Offset Data Sheet 10V REF 0xF000 0x8000 1500 2000 10V ...
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... Figure 16. AD5544 Power Supply Current vs. Clock Frequency 100 100 1k 10k 100k FREQUENCY (Hz) Figure 17. AD5544/AD5554 Power Supply Rejection vs. Frequency 20 0 –20 –40 –60 –80 –100 –120 –140 –160 0 5k 10k 15k FREQUENCY (Hz) Figure 18. AD5544/AD5554 Analog THD 10M ...
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... AD5544/AD5554 300 250 200 150 100 0.5 1.0 1.5 2.0 2.5 3.0 LOGIC INPUT (V) Figure 19. AD5544/AD5554 Power Supply Current vs. Logic Input Voltage 3.5 4.0 4.5 5.0 Rev Page Data Sheet ...
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... Rev Page AD5544/AD5554 AD5544 and the AD5554 accommodate input OUT OUT OUT on the inverting input node of the amplifier. x and R OUT AD5544 and the AD5554, respectively. To maintain good AD5544/AD5554 2 0 –2 –4 –6 –8 100k 1M 10M FREQUENCY (Hz) Figure 21. ...
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... AD5544/AD5554 REF DIGITAL INTERFACE CONNECTIONS OMITTED. FOR CLARITY SWITCHES S1 AND S2 ARE CLOSED, AND V MUST BE POWERED AD5544 5kΩ OUT A GND A GND FROM OTHER DACS A GND DGND Figure 22. Recommended Kelvin-Sensed Hookup Rev Page 15V ANALOG ...
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... D15 to Bit D0) to the decoded DAC input register address determined by Bit A1 and Bit A0. Any extra bits clocked into the AD5544 shift register are ignored; only the last 18 bits clocked in are used. If double-buffered data is not needed, the LDAC pin can be tied logic low to disable the DAC registers ...
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... High X High Low High 1 For the AD5544, data appears at the SDO pin 19 clock pulses after input at the SDI pin don’t care. ↑ positive logic transition power-on, both the input register and the DAC register are loaded with all 0s. ...
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... The ideal power-up sequence power follows noncompliance power-up sequence may elevate the reference = 1 current, but the devices resume normal operation once V V are powered up. SS Rev Page AD5544/AD5554 REF DAC ...
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... DGND terminal should be joined remotely single point to the analog ground plane (see Figure 26). Rev Page Data Sheet AD5544/AD5554 10µF 0.1µ GND C4 C2 10µF 0.1µF V DGND SS x pins of the AD5544/AD5554 serve as GND ...
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... DAC. This is done by using low input capacitance buffer amplifiers and careful board design 5554 (4) Analog Devices offers a wide range of amplifiers for both precision dc and ac applications, as listed in Table 11 and Table 12. Rev Page AD5544/AD5554 . FB and AGND), they settle quickly. IN node (the voltage output node in this application) of REF ...
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... AD5544/AD5554 Table 10. Suitable Analog Devices Precision References Part No. Output Voltage (V) Initial Tolerance (%) ADR01 10 0.05 ADR01 10 0.05 ADR02 5.0 0.06 ADR02 5.0 0.06 ADR03 2.5 0.1 ADR03 2.5 0.1 ADR06 3.0 0.1 ADR06 3.0 0.1 ADR420 2.048 0.05 ADR421 2.50 0.04 ADR423 3.00 0.04 ADR425 5.00 0.04 ADR431 2.500 0.04 ADR435 5.000 0.04 ADR391 2.5 0.16 ADR395 5.0 0.10 Table 11. Suitable Analog Devices Precision Op Amps V OS Part No. Supply Voltage (V) (µ ...
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... SDP1Z system demonstration platform board available from Analog Devices, which is purchased separately from the evaluation board. The USB-to-SPI communication to the AD5544 is completed using this Blackfin®-based demonstration board. SYSTEM DEMONSTRATION PLATFORM The system demonstration platform (SDP hardware and software evaluation tool for use in conjunction with product evaluation boards ...
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... AD5544/AD5554 EVALUATION BOARD SCHEMATICS + + + + 13 Figure 30. EVAL-AD5544SDZ Schematic Part A Rev Page Data Sheet 00943-102 + 12 ...
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... PAR_D18 113 * PAR_D20 114 * PAR_D22 115 GND 116 VIO(+3.3V) 117 GND 118 GND 119 NC 120 NC Figure 31. EVAL-AD5544SDZ Schematic Part B Rev Page AD5544/AD5554 U10 VCC SCL 4 VSS 5 SDA 24LC64 /RS (connected to blackfin GPIO - use I2C_0 first) SCLK SDIN /CS SDO 3 ...
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... AD5544/AD5554 + + + + + + 7 Figure 32. EVAL-AD5544SDZ Schematic Part C Rev Page Data Sheet 00943-104 + + + 24 ...
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... Data Sheet EVALUATION BOARD LAYOUT Figure 33. Silkscreen Figure 34. Component Side Rev Page AD5544/AD5554 ...
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... AD5544/AD5554 Figure 35. Solder Side Rev Page Data Sheet ...
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... BSC 16 0.50 TOP VIEW 0.40 0.30 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF COMPLIANT TO JEDEC STANDARDS MO-220-WHHD. Figure 37. 32-Lead Lead Frame Chip Scale Package [LFCSP_WQ × Body, Very Very Thin Quad (CP-32-11) Dimensions shown in millimeters Rev Page AD5544/AD5554 0.25 0.09 8° 0.95 4° 0.75 0° 0. 3.65 EXPOSED PAD 3. ...
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... AD5544ARS 16 ±2 AD5544ARSZ 16 ±2 AD5544ARSZ-REEL7 16 ±2 AD5544BRSZ 16 ±1 AD5544BRSZ-REEL7 16 ±1 AD5544ACPZ-1-R2 16 ±4 AD5544ACPZ-1-RL7 16 ±4 AD5544BCPZ-R2 16 ±1 AD5544BCPZ-RL7 16 ±1 AD5554BRSZ 14 ±0.5 EVAL-AD5544SDZ RoHS Compliant Part refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors). ©2000–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners ...