CS8420-CSZ Cirrus Logic Inc, CS8420-CSZ Datasheet - Page 26
![IC SAMPLE RATE CONVERTER 28SOIC](/photos/7/3/70380/cs8420-csz_sml.jpg)
CS8420-CSZ
Manufacturer Part Number
CS8420-CSZ
Description
IC SAMPLE RATE CONVERTER 28SOIC
Manufacturer
Cirrus Logic Inc
Type
Sample Rate Converterr
Specifications of CS8420-CSZ
Package / Case
28-SOIC
Applications
CD-R, DAT, DVD, MD, VTR
Mounting Type
Surface Mount
Operating Supply Voltage
5 V
Operating Temperature Range
- 10 C to + 70 C
Mounting Style
SMD/SMT
Resolution
17 bit to 24 bit
Control Interface
3 Wire, Serial
Supply Voltage Range
4.75V To 5.25V
Audio Ic Case Style
SOIC
No. Of Pins
28
Bandwidth
20kHz
Rohs Compliant
Yes
Audio Control Type
Volume
Dc
0841
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1782 - EVALUATION BOARD FOR CS8420
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1125-5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CS8420-CSZ
Manufacturer:
CIRRUS
Quantity:
319
Company:
Part Number:
CS8420-CSZ
Manufacturer:
CIRRUS
Quantity:
9 908
Part Number:
CS8420-CSZ
Manufacturer:
CIRRUS
Quantity:
20 000
Company:
Part Number:
CS8420-CSZ/D1
Manufacturer:
CIRRUS
Quantity:
378
Company:
Part Number:
CS8420-CSZR
Manufacturer:
NICHICON
Quantity:
4 200
26
In or Out
In or Out
TCBL
TCBL
TXP(N)
VLRCK
TXP(N)
VLRCK
TXP(N)
Output
Output
VLRCK= ILRCK if SILRPOL = 1.
VLRCK duty cycle is 50%
VLRCK = ILRCK if SILRPOL = 1.
SDIN
VLRCK is a virtual word clock, which may not exist, and is used to illustrate CUV timing.
In stereo mode, VLRCK frequency = AES3 frame rate. In mono mode, ALRCK frequency = 2xAES3 frame rate.
If the serial audio input port is in slave mode and TCBL is an output, the VLRCK=ILRCK if SILRPOL=0 and
If the serial audio input port is in master mode and TCBL is an input, the VLRCK=ILRCK if SILRPOL=0 and
U
Input
Input
Input
SDIN
VCU
Input
Tth
Tth
Z
Z
Z
*Assume MMTLR = 0
*Assume MMTLR = 1
Data [4]
Tsetup
Data [0]
Data [4]
Figure 20. AES3 Transmitter Timing for C, U and V Pin Input Data
VCU[0]
Data [0]*
Data [1]*
Y
Thold
Data [5]
Data [1]
Data [5]
.
AES3 Transmitter in Stereo Mode
VCU[1]
AES3 Transmitter in Mono Mode
U[0]
Y
X
Y
Data [6]
Data [6]
Data [2]
Data [3]*
Data [2]*
VCU[2]
Y
Data [7]
Data [7]
Data [3]
Tsetup = > 7.5 % AES3 frame time
VCU[3]
Thold = 0
Tsetup = > 15 % AES3 frame time
Thold = 0
Tth > 3 OMCK if TCBL is Input
Tth > 3 OMCK if TCBL is Input
U[2]
X
X
X
Data [8]
Data [8]
Data [4]
Data [5]*
Data [4]*
VCU[4]
CS8420
DS245F4