AD5363 Analog Devices, AD5363 Datasheet - Page 4

• Manufacturer Part Number: AD5363
• Description: 8-Channel, 14-Bit, Serial Input, Voltage-Output DAC
• Manufacturer: Analog Devices

Specifications of AD5363

• Resolution (bits): 14bit
• Dac Settling Time: 20µs
• Single-supply: No
• Dac Type: Voltage Out
• Dac Input Format: Ser,SPI

AD5362/AD5363
SPECIFICATIONS
DV
R
Table 2.
Parameter
ACCURACY
REFERENCE INPUTS (VREF0, VREF1)
SIGGND0 AND SIGGND1 INPUTS
OUTPUT CHARACTERISTICS
MONITOR PIN (MON_OUT)
DIGITAL INPUTS
L
Resolution
Integral Nonlinearity (INL)
Differential Nonlinearity (DNL)
Zero-Scale Error
Full-Scale Error
Gain Error
Zero-Scale Error
Full-Scale Error
VOUTx
DC Crosstalk
VREFx Input Current
VREFx Range
DC Input Impedance
Input Range
SIGGNDx Gain
Output Voltage Range
Nominal Output Voltage Range
Short-Circuit Current
Load Current
Capacitive Load
DC Output Impedance
Output Impedance
Three-State Leakage Current
Continuous Current Limit
Span Error of Offset DAC
Input High Voltage
Input Low Voltage
Input Current
Input Capacitance
= open circuit; gain (M), offset (C), and DAC offset registers at default values; all specifications T
CC
DAC Output at Positive Full Scale
DAC Output at Negative Full Scale
= 2.5 V to 5.5 V; V
3
Temperature Coefficient
2
2
2
2
2
DD
2
2
= 9 V to 16.5 V; V
2
2
SS
B Version
16
14
±4
±1
±1
±15
±20
0.1
1
1
±75
5
180
±10
2/5
50
±0.5
0.995/1.005
V
V
−10 to +10
15
±1
2200
0.5
1000
500
100
2
1.7
2.0
0.8
±1
±20
10
SS
DD
= −16.5 V to −4.5 V; V
+ 1.4
− 1.4
1
Unit
Bits
Bits
LSB max
LSB max
LSB max
mV max
mV max
% FSR
LSB typ
LSB typ
mV max
ppm FSR/°C typ
μV max
μA max
V min/V max
kΩ min
V min/V max
min/max
V min
V max
V
mA max
mA max
pF max
Ω max
Ω typ
Ω typ
nA typ
mA max
V min
V min
V max
μA max
μA max
pF max
Rev. A | Page 4 of 28
REF
= 5 V; AGND = DGND = SIGGND0 = SIGGND1 = 0 V;
Test Conditions/Comments
AD5362
AD5363
AD5362
AD5363
Guaranteed monotonic by design over temperature
Before calibration
Before calibration
Before calibration
After calibration
After calibration
See the Offset DACs section for details
Includes linearity, offset, and gain drift
Typically 20 μV; measured channel at midscale, full-scale
change on any other channel
Per input; typically ±30 nA
±2% for specified operation
Typically 55 kΩ
I
I
VOUTx
DV
DV
DV
RESET, SYNC, SDI, and SCLK pins
CLR, BIN/2SCOMP, and GPIO pins
LOAD
LOAD
CC
CC
CC
= 1 mA
= 1 mA
= 3.6 V to 5.5 V
= 2.5 V to 3.6 V
= 2.5 V to 5.5 V
3
to DV
CC
, V
DD
, or V
MIN
to T
SS
MAX
, unless otherwise noted.