AD5791 Analog Devices, AD5791 Datasheet - Page 25

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AD5791

Manufacturer Part Number
AD5791
Description
Manufacturer
Analog Devices
Datasheet

Specifications of AD5791

Resolution (bits)
20bit
Dac Update Rate
1MSPS
Dac Settling Time
1µs
Max Pos Supply (v)
+16.5V
Single-supply
No
Dac Type
Unbuffered Vout
Dac Input Format
Ser,SPI

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Data Sheet
AD5791
POWER-ON TO 0 V
The
resetting all registers to their default values, controls the output
voltage during power-up. Upon power-on the DAC is placed in
tristate (its reference inputs are disconnected) and its output is
clamped to ground through a ~6 kΩ resistor. The DAC remains
in this state until programmed otherwise via the control
register. This is a useful feature in applications where it is
important to know the state of the DAC output while it is in the
process of powering up.
CONFIGURING THE
After power-on the
normal operating mode before programming the output. To do
this, the control register must be programmed. The DAC is
removed from tristate by clearing the DACTRI bit, and the
output clamp is removed by clearing the OPGND bit. At this
point, the output goes to V
first programmed to the DAC register.
DAC OUTPUT STATE
The DAC output can be placed in one of three states, controlled
by the DACTRI and OPGND bits of the control register, as
shown in Table 16.
Table 16.
DACTRI
0
0
1
1
LINEARITY COMPENSATION
The integral nonlinearity (INL) of the
to the applied reference voltage span, the LIN COMP bits of
the control register can be programmed to compensate for
this variation in INL. The specifications in this data sheet are
obtained with LIN COMP = 0000 for reference spans up to
and including 10 V and with LIN COMP = 1100 for a reference
span of 20 V. The default value of the LIN COMP bits is 0000.
Intermediate LIN COMP values can be programmed for reference
spans between 10 V and 20 V as shown in Table 12.
OUTPUT AMPLIFIER CONFIGURATION
There are a number of different ways that an output amplifier
can be connected to the AD5791, depending on the voltage
references applied and the desired output voltage span.
AD5791
AD5791
OPGND
0
1
0
1
FEATURES
contains a power-on reset circuit that, as well as
Output State Truth Table
AD5791
Output State
Normal operating mode
Output is clamped via ~6 kΩ to AGND
Output is in tristate
Output is clamped via ~6 kΩ to AGND
AD5791
REFN
must be configured to put it into
, unless an alternative value is
AD5791
can vary according
Rev. C | Page 25 of 28
Unity Gain Configuration
Figure 52 shows an output amplifier configured for unity gain,
in this configuration the output spans from V
A second unity gain configuration for the output amplifier is
one that removes an offset from the input bias currents of the
amplifier. It does this by inserting a resistance in the feedback
path of the amplifier that is equal to the output resistance of the
DAC. The DAC output resistance is 3.4 kΩ, by connecting R1
and R
available on chip. Because the resistors are all on one piece of
silicon, they are temperature coefficient matched. To enable this
mode of operation the RBUF bit of the control register must be
set to Logic 1. Figure 53 shows how the output amplifier is
connected to the AD5791. In this configuration, the output
amplifier is in unity gain and the output spans from V
V
in the amplifier feedback path to improve dynamic performance.
Figure 53. Output Amplifier in Unity Gain with Amplifier Input Bias Current
REFP
1/2 AD8676
1/2 AD8676
1/2 AD8676
1/2 AD8676
. This unity gain configuration allows a capacitor to be placed
FB
V
V
in parallel, a resistance equal to the DAC resistance is
V
V
REFPF
REFNF
Figure 52. Output Amplifier in Unity Gain Configuration
REFPF
REFNF
V
V
V
V
REFP
REFN
REFP
REFN
20-BIT
DAC
20-BIT
DAC
V
V
V
V
REFNS
REFPS
REFNS
REFPS
R1
A1
6.8kΩ
Compensation
6.8kΩ 6.8kΩ
R1
AD5791
R
AD5791
FB
R
FB
6.8kΩ
V
V
R
OUT
INV
R
OUT
INV
FB
FB
REFN
10pF
AD8675,
ADA4898-1
AD8675,
ADA4898-1
to V
AD5791
REFN
REFP
V
V
OUT
.
OUT
to

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