AD5755-1 Analog Devices, AD5755-1 Datasheet - Page 31

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AD5755-1

Manufacturer Part Number
AD5755-1
Description
Quad Channel, 16-Bit, Serial Input, 4-20mA & Voltage Output DAC, Dynamic Power Control, HART Connectivity
Manufacturer
Analog Devices
Datasheet

Specifications of AD5755-1

Resolution (bits)
16bit
Dac Update Rate
91kSPS
Dac Settling Time
11µs
Max Pos Supply (v)
+33V
Single-supply
No
Dac Type
I or V Out
Dac Input Format
SPI

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Quantity
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Part Number:
AD5755-1ACPZ-REEL7
Manufacturer:
AD
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201
Data Sheet
REGISTERS
Table 7 shows an overview of the registers for the AD5755-1.
Table 7. Data, Control, and Readback Registers for the AD5755-1
Register
Data
Control
Readback
DAC Data Register (×4)
Gain Register (×4)
Offset Register (×4)
Clear Code Register (×4)
Main Control Register
Software Register
Slew Rate Control Register (×4)
DAC Control Register (×4)
DC-to-DC Control Register
Status Register
data registers, one per DAC channel.
gain registers, one per DAC channel.
simultaneously, and enables and sets conditions of the watchdog timer. See the Device Features
section for more details.
feature, to verify correct data communication operation.
Enable/disable overrange.
Enable/disable internal circuitry on a per channel basis.
Enable/disable output on a per channel basis.
Power on dc-to-dc converters on a per channel basis.
There are four DAC control registers, one per DAC channel.
Use to set the dc-to-dc control parameters. Can control dc-to-dc maximum voltage, phase, and
frequency.
Description
Used to write a DAC code to each DAC channel. AD5755-1 data bits = D15 to D0. There are four DAC
Used to program gain trim, on a per channel basis. AD5755-1 data bits = D15 to D0. There are four
Used to program offset trim, on a per channel basis. AD5755-1 data bits = D15 to D0. There are four
offset registers, one per DAC channel.
Used to program clear code on a per channel basis. AD5755-1 data bits = D15 to D0. There are four
clear code registers, one per DAC channel.
Used to configure the part for main operation. Sets functions such as status readback during write,
enables output on all channels simultaneously, powers on all dc-to-dc converter blocks
Has three functions. Used to perform a reset, to toggle the user bit, and, as part of the watchdog timer
Used to program the slew rate of the output. There are four slew rate control registers, one per
channel.
These registers are used to control the following:
Set the output range, for example, 4 mA to 20 mA, 0 V to 10 V.
Set whether an internal/external sense resistor is used.
Enable/disable a channel for CLEAR.
This contains any fault information, as well as a user toggle bit.
Rev. B | Page 31 of 52
AD5755-1

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