AD7666 Analog Devices, AD7666 Datasheet - Page 18

• Manufacturer Part Number: AD7666
• Manufacturer: Analog Devices

Specifications of AD7666

• Resolution (bits): 16bit
• # Chan: 1
• Sample Rate: 500kSPS
• Interface: Par,Ser,SPI
• Analog Input Type: Diff-Uni
• Ain Range: (Vref) p-p,2.5V p-p,Uni (Vref),Uni 2.5V
• Adc Architecture: SAR
• Pkg Type: CSP,QFP

AD7666
TYPICAL CONNECTION DIAGRAM
Figure 26 shows a typical connection diagram for the AD7666.
Analog Input
Figure 27 shows an equivalent circuit of the input structure of
the AD7666.
The two diodes, D1 and D2, provide ESD protection for the
analog inputs IN and INGND. Care must be taken to ensure
that the analog input signal never exceeds the supply rails by
more than 0.3 V. This will cause these diodes to become
forward-biased and start conducting current. These diodes can
handle a forward-biased current of 100 mA maximum. For
instance, these conditions could eventually occur when the
input buffer’s (U1) supplies are different from AVDD. In such a
case, an input buffer with a short-circuit current limitation can
be used to protect the part.
This analog input structure allows the sampling of the differen-
tial signal between IN and INGND. Unlike other converters,
INGND is sampled at the same time as IN. By using this
differential input, small signals common to both inputs are
rejected, as shown in Figure 28, which represents the typical
CMRR over frequency with on-chip and external references.
For instance, by using INGND to sense a remote signal ground,
ground potential differences between the sensor and the local
ADC ground are eliminated.
OR INGND
AGND
90
80
70
60
50
40
30
1
IN
Figure 28. Analog Input CMRR vs. Frequency
Figure 27. Equivalent Analog Input Circuit
10
C1
REF
AVDD
FREQUENCY (kHz)
D1
D2
EXT REF
100
1000
R1
C2
10000
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During the acquisition phase, the impedance of the analog
input IN can be modeled as a parallel combination of capacitor
C1 and the network formed by the series connection of R1 and
C2. C1 is primarily the pin capacitance. R1 is typically 168 Ω
and is a lumped component made up of some serial resistors
and the on resistance of the switches. C2 is typically 60 pF and
is mainly the ADC sampling capacitor. During the conversion
phase, where the switches are opened, the input impedance is
limited to C1. R1 and C2 make a 1-pole low-pass filter that
reduces undesirable aliasing effect and limits the noise.
When the source impedance of the driving circuit is low, the
AD7666 can be driven directly. Large source impedances will
significantly affect the ac performance, especially total
harmonic distortion (THD). The maximum source impedance
depends on the amount of THD that can be tolerated. The THD
degrades as a function of the source impedance and the
maximum input frequency, as shown in Figure 29.
Driver Amplifier Choice
Although the AD7666 is easy to drive, the driver amplifier
needs to meet the following requirements:
•
–100
–110
–50
–60
–70
–80
–90
The driver amplifier and the AD7666 analog input circuit
must be able to settle for a full-scale step of the capacitor
array at a 16-bit level (0.0015%). In the amplifier’s data
sheet, settling at 0.1% to 0.01% is more commonly speci-
fied. This could differ significantly from the settling time at
a 16-bit level and should be verified prior to driver
selection. The tiny op amp AD8021, which combines ultra
low noise and high gain-bandwidth, meets this settling
time requirement even when used with gains up to 13.
Figure 29. THD vs. Analog Input Frequency and Source Resistance
1
INPUT FREQUENCY (kHz)
10
100
R
R
R
R
S
S
S
S
= 500 Ω
= 100 Ω
= 50 Ω
= 20 Ω
1000