AD7762 Analog Devices, AD7762 Datasheet - Page 4

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AD7762

Manufacturer Part Number
AD7762
Description
Parallel Interface, 625 kSPS, 24-Bit Sigma-Delta A/D Converter
Manufacturer
Analog Devices
Datasheet

Specifications of AD7762

Resolution (bits)
24bit
# Chan
1
Sample Rate
40MSPS
Interface
Par
Analog Input Type
Diff-Uni
Ain Range
(1.6Vref) p-p,4 V p-p,6.5 V p-p
Adc Architecture
Sigma-Delta
Pkg Type
QFP

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AD7762
Parameter
REFERENCE INPUT/OUTPUT
POWER DISSIPATION
POWER REQUIREMENTS
DIGITAL I/O
1
2
3
4
See the Terminology section.
SNR specifications in dBs are referred to a full-scale input, FS. Tested with an input signal at 0.5 dB below full scale, unless otherwise specified.
While the AD7762 can function with an MCLK amplitude of less than 5 V, this is the recommended amplitude to achieve the performance as stated.
Tested with a 400 μA load current.
V
V
V
Total Power Dissipation
Standby Mode
Normal Mode
Low Power Mode
MCLK Input Amplitude
Input Capacitance
Input Leakage Current
Three-State Leakage Current (D15:D0)
V
V
V
V
AV
AV
AV
AV
DV
V
AI
AI
AI
AI
AI
AI
AI
DI
REF
REF
REF
INH
INL
OH
OL
DRIVE
4
DD1
DD2
DD4
DD1
DD2
DD4
DD3
DD
4
DD1
DD2
DD3
DD4
Input Voltage
Input DC Leakage Current
Input Capacitance
DD
(Modulator)
(General)
(Reference Buffer)
(Modulator)
(General)
(Reference Buffer)
(Diff Amp)
(Modulator Supply)
(General Supply)
(Diff Amp Supply)
(Ref Buffer Supply)
3
Test Conditions/Comments
V
V
Normal mode
Low power mode
Clock stopped
±5%
±5%
±5%
AV
AV
AV
Both modes
DD3
DD3
DD4
DD4
DD3
= 3.3 V ± 5%
= 5 V ± 5%
= 5 V
= 5 V
= 5 V, both modes
Rev. 0 | Page 4 of 28
Specification
+2.5
+4.096
±6
5
958
661
6.35
+2.5
+5
+3.15/+5.25
+3.15/+5.25
+2.5
+1.65/+2.7
49/51
40/42
34/36
26/28
20/23
9/10
41/44
63/70
5
7.3
±5
±5
0.7 × V
0.3 × V
1.5
0.1
DRIVE
DRIVE
Unit
V max
V max
μA max
pF max
mW max
mW max
mW max
V min/max
V min/max
V
V min/max
mA typ/max
mA typ/max
mA typ/max
mA typ/max
mA typ/max
mA typ/max
mA typ/max
mA typ/max
V typ
pF typ
μA max
μA max
V min
V max
V min
V max
V
V

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