AD7142 Analog Devices, AD7142 Datasheet - Page 35

• Manufacturer Part Number: AD7142
• Description: Programmable Controller for Capacitance Touch Sensors
• Manufacturer: Analog Devices

Specifications of AD7142

• Resolution (bits): 16bit
• # Chan: 14
• Sample Rate: 250kSPS
• Interface: I²C/Ser 2-Wire,Ser,SPI
• Analog Input Type: Diff-Uni
• Ain Range: ± 2 pF (Delta C)
• Adc Architecture: Sigma-Delta
• Pkg Type: CSP

WRITE TRANSACTIONS
WRITE
READ (USING REPEATED START)
V
The supply voltage to all pins associated with both the I
SPI serial interfaces (SDO, SDI, SCLK, SDA, and CS ) is separate
from the main V
S
S
READ (WRITE TRANSACTION SETS UP REGISTER ADDRESS)
SEPARATE READ AND
S
DRIVE
6-BIT DEVICE
6-BIT DEVICE
6-BIT DEVICE
REPEATED START
ADDRESS
ADDRESS
ADDRESS
SCLK
OUTPUT FROM MASTER
OUTPUT FROM AD7142
SDA
INPUT
START
1. A START CONDITION AT THE BEGINNING IS DEFINED AS A HIGH-TO-LOW TRANSITION ON SDA WHILE SCLK REMAINS HIGH.
2. A STOP CONDITION AT THE END IS DEFINED AS A LOW-TO-HIGH TRANSITION ON SDA WHILE SCLK REMAINS HIGH.
3. THE MASTER GENERATES THE ACK AT THE END OF THE READBACK TO SIGNAL THAT IT DOES NOT WANT ADDITIONAL DATA.
4. 7-BIT DEVICE ADDRESS [DEV A6:DEV A0] = [0 1 0 1 1 X X], WHERE THE TWO LSB X's ARE DON'T CARE BITS.
5. 16-BIT REGISTER ADDRESS[A15:A0] = [X, X, X, X, X, X, A9, A8, A7, A6, A5, A4, A3, A2, A1, A0], WHERE THE UPPER LSB X’s ARE DON’T CARE BITS.
6. REGISTER ADDRESS [A15:A8] AND REGISTER ADDRESS [A7:A0] ARE ALWAYS SEPARATED BY A LOW ACK BITS.
7. REGISTER DATA [D15:D8] AND REGISTER DATA [D7:D0] ARE ALWAYS SEPARATED BY A LOW ACK BIT.
8. THE R/W BIT IS SET TO A1 TO INDICATE A READBACK OPERATION.
NOTES
USING
W
W
W
CC
t
1
REGISTER ADDR
REGISTER ADDR
REGISTER ADDR
supplies and is connected to the V
DEV
HIGH BYTE
A6
HIGH BYTE
1
[15:8]
DEV
AD7142-1 DEVICE ADDRESS
A5
SR
2
S = START BIT
P = STOP BIT
SR = REPEATED START BIT
28
P
DEV
A4
DEV
A6
3
29
REGISTER ADDR
DEV
REGISTER ADDR
28
REGISTER ADDR
A3
S
t
AD7142-1 DEVICE ADDRESS
2
DEV
A5
LOW BYTE
4
LOW BYTE
30
DEV
[7:0]
DEV
A6
A2
Figure 51. Example of I
29
5
Figure 52. Example of Sequential I
AD7142-1 DEVICE ADDRESS
DEV
DEV
A5
A1
30
6
t
3
DEV
A0
DEV
HIGH BYTE [15:8]
7
ACK = ACKNOWLEDGE BIT
ACK = NO ACKNOWLEDGE BIT
A1
P
WRITE DATA
6-BIT DEVICE
34
R/W
ADDRESS
DEV
DRIVE
S
A0
8
t
4
35
2
6-BIT DEVICE
ACK
DEV
C and
A1
ADDRESS
34
2
R/W
9
C Timing for Single Register Readback Operation
pin.
36
Rev. A | Page 35 of 72
DEV
A15
A0
t
4
35
10
ACK
REGISTER ADDRESS[A15:A8]
LOW BYTE [7:0]
37
HIGH BYTE [15:8]
R/W
WRITE DATA
A14
36
READ DATA
11
D7
38
2
ACK
C Write and Readback Operation
HIGH BYTE [15:8]
REGISTER DATA[D7:D0]
37
READ DATA
D6
39
t
This allows the AD7142 to be connected directly to processors
whose supply voltage is less than the minimum operating
voltage of the AD7142 without the need for external level-
shifters. The V
low as 1.65 V and as high as DV
5
D7
38
REGISTER DATA[D7:D0]
D6
A9
39
LOW BYTE [7:0]
t
HIGH BYTE [15:8]
5
16
READ DATA
WRITE DATA
A8
LOW BYTE [7:0]
17
D1
READ DATA
44
ACK
DRIVE
18
D0
45
D1
A7
pin can be connected to voltage supplies as
44
ACK
19
REGISTER ADDRESS[A7:A0]
46
LOW BYTE [7:0]
HIGH BYTE [15:8]
D0
A6
WRITE DATA
READ DATA
45
20
t
ACK
HIGH BYTE [15:8]
6
P
46
READ DATA
CC
.
t
8
P
P
A1
LOW BYTE [7:0]
25
t
READ DATA
7
A0
LOW BYTE [7:0]
26
AD7142 DEVICE ADDRESS
READ DATA
DEV
ACK
A6
27
1
DEV
AD7142
ACK
A5
2
P
DEV
ACK
A4
3
P