AD9271 Analog Devices, AD9271 Datasheet - Page 36

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AD9271

Manufacturer Part Number
AD9271
Description
Octal LNA/VGA/AAF/ADC and Crosspoint Switch
Manufacturer
Analog Devices
Datasheet

Specifications of AD9271

Resolution (bits)
12bit
# Chan
8
Sample Rate
50MSPS
Interface
LVDS,Ser
Analog Input Type
SE-Uni
Ain Range
0.25 V p-p,0.32 V p-p,0.4 V p-p
Adc Architecture
Pipelined
Pkg Type
QFP

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AD9271
This interface is flexible enough to be controlled by either serial
PROMs or PIC mirocontrollers. This provides the user an
alternative method, other than a full SPI controller, to program
the device (see the AN-812 Application Note).
Table 14. Serial Timing Definitions
Parameter
t
t
t
t
t
t
t
t
t
DS
DH
CLK
S
H
HI
LO
EN_SDIO
DIS_SDIO
SCLK
SDIO
CSB
DON’T CARE
DON’T CARE
t
S
R/W
Minimum Timing (ns)
5
2
40
5
2
16
16
10
10
t
DS
W1
W0
t
DH
A12
A11
t
HI
Description
Setup time between the data and the rising edge of SCLK
Hold time between the data and the rising edge of SCLK
Period of the clock
Setup time between CSB and SCLK
Hold time between CSB and SCLK
Minimum period that SCLK should be in a logic high state
Minimum period that SCLK should be in a logic low state
Minimum time for the SDIO pin to switch from an input to an output relative to the SCLK
falling edge (not shown in Figure 71)
Minimum time for the SDIO pin to switch from an output to an input relative to the SCLK
rising edge (not shown in Figure 71)
A10
t
Figure 71. Serial Timing Details
LO
A9
Rev. B | Page 36 of 60
t
CLK
A8
A7
D5
D4
D3
D2
D1
D0
t
H
DON’T CARE
DON’T CARE

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