AD7294 Analog Devices, AD7294 Datasheet - Page 42

• Manufacturer Part Number: AD7294
• Description: 12-Bit Monitor and Control System with Multichannel ADC, DACs, Temperature Sensor, and Current Sense
• Manufacturer: Analog Devices

Specifications of AD7294

• Resolution (bits): 12bit
• # Chan: 9
• Sample Rate: 200kSPS
• Interface: I²C/Ser 2-Wire,Ser
• Analog Input Type: Diff-Uni,SE-Uni
• Ain Range: (Vref) p-p,2 V p-p,Uni (Vref),Uni (Vref) x 2
• Adc Architecture: SAR
• Pkg Type: CSP

AD7294
The hysteresis register can be used to avoid flicker on the ALERT/
BUSY pin. If the hysteresis function is enabled, the conversion
result must return to a value of at least N LSB below the DATA
register value, or N LSB above the DATA
ALERT/BUSY output pin and alert_flag bit to be reset. The value of
N is taken from the 12-bit hysteresis register associated with that
channel. By setting the hysteresis register to a code close to the
maximum output code for the ADC, that is, 0x77D, DATA
or DATA
Bit D11 of the T
the diode open-circuit flag. If this bit is set to 0, it indicates the
presence of an open circuit between the Dx+ and Dx− pins. An
alert triggered on either I
is cleared by the user writing to the alert register. The contents
of the DATA
values on power-up (see Table 28).
HYSTERESIS
The hysteresis value determines the reset point for the ALERT/
BUSY pin and/or alert_flag bit if a violation of the limits occurs.
The hysteresis register stores the hysteresis value, N, when using
the limit registers. Each pair of limit registers has a dedicated
hysteresis register. For example, if a hysteresis value
LOW
HIGH
alerts do not clear automatically by the AD7294.
SENSE
and DATA
HIGH LIMIT – HYSTERESIS
LOW LIMIT + HYSTERESIS
DATA
SENSE
HIGH
LOW
ALERT SIGNAL
OVERRANGE pin remains until it
INPUT SIGNAL
registers are reset to their default
HIGH LIMIT
LOW LIMIT
or DATA
LOW
LOW
register value for the
limit registers is
Figure 58. Limit Checking
HIGH
HIGH
Rev. H | Page 42 of 48
of 8 LSBs is required on the upper and lower limits of V
the 16-bit word 0000 0000 0000 1000 should be written to the
hysteresis register of V
hysteresis registers contain a value of 8 LSBs for nontempera-
ture result registers and 8°C, or 32 LSBs, for the T
If a different hysteresis value is required, that value must be
written to the hysteresis register for the channel in question.
The advantage of having hysteresis registers associated with
each of the limit registers is that it prevents chatter on the alert
bits associated with each ADC channel. Figure 58 shows the
limit checking operation.
Using the Limit Registers to Store Minimum/Maximum
Conversion Results
If FFF is written to the hysteresis register for a particular channel,
the DATA
act as limit registers as previously described, but act as storage
registers for the maximum and minimum conversion results.
This function is useful when an alert signal is not required in an
application, but it is still required to monitor the minimum and
maximum conversion values over time. Note that on power-up,
the contents of the DATA
maximum code, whereas the contents of the DATA
are set to minimum code by default.
HIGH
and DATA
IN
0 (see Table 9). On power-up, the
LOW
HIGH
registers for that channel no longer
register for each channel are set to
TIME
Data Sheet
SENSE
LOW
registers.
registers
IN
0,