AD7294 Analog Devices, AD7294 Datasheet - Page 37

• Manufacturer Part Number: AD7294
• Description: 12-Bit Monitor and Control System with Multichannel ADC, DACs, Temperature Sensor, and Current Sense
• Manufacturer: Analog Devices

Specifications of AD7294

• Resolution (bits): 12bit
• # Chan: 9
• Sample Rate: 200kSPS
• Interface: I²C/Ser 2-Wire,Ser
• Analog Input Type: Diff-Uni,SE-Uni
• Ain Range: (Vref) p-p,2 V p-p,Uni (Vref),Uni (Vref) x 2
• Adc Architecture: SAR
• Pkg Type: CSP

Data Sheet
Writing Two Bytes of Data to a 16-Bit Register
The limit and hysteresis registers (0x0B to 0x25), the result
registers (0x01 to 0x04), and the configuration register (0x09)
are 16-bit registers; therefore, two bytes of data are required to
write a value to any one of these registers. Writing two bytes of
data to one of these registers consists of the following sequence:
1.
2.
3.
4.
5.
6.
7.
8.
9.
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by the
write bit (low).
The addressed slave device asserts an acknowledge on SDA.
The master sends a register address. The slave asserts an
acknowledge on SDA.
The master sends the first data byte (most significant).
The slave asserts an acknowledge on SDA.
The master sends the second data byte (least significant).
The slave asserts an acknowledge on SDA.
The master asserts a stop condition on SDA to end the
transaction.
...
S
FROM MASTER TO SLAVE
FROM SLAVE TO MASTER
DATA<15:8>
SLAVE ADDRESS
S
FROM MASTER TO SLAVE
FROM SLAVE TO MASTER
A
SLAVE ADDRESS
S = START CONDITION
SR = REPEATED START
P = STOP CONDITION
A = ACKNOWLEDGE
A = NOT ACKNOWLEDGE
0
DATA<7:0>
A
POINT TO PD REG (0x0A)
S = START CONDITION
SR = REPEATED START
P = STOP CONDITION
A = ACKNOWLEDGE
A = NOT ACKNOWLEDGE
0
A
Figure 52. Writing Two Bytes of Data to a 16-Bit Register
A
P
Figure 53. Writing to Multiple Registers
REG POINTER
Rev. H | Page 37 of 48
A
A
Writing to Multiple Registers
Writing to multiple address registers consists of the following:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. The master sends the second data byte.
11. The slave asserts an acknowledge on SDA.
12. The master asserts a stop condition on SDA to end the
The previous examples detail writing to two registers only
(the Alert Status Register A and the configuration register).
However, the
write operation as shown in Figure 53.
DATA<7:0>
DATA<15:8>
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by the
write bit (low).
The addressed slave device (AD7294) asserts an
acknowledge on SDA.
The master sends a register address, for example the Alert
Status Register A register address. The slave asserts an
acknowledge on SDA.
The master sends the data byte.
The slave asserts an acknowledge on SDA.
The master sends a second register address, for example
the configuration register. The slave asserts an
acknowledge on SDA.
The master sends the first data byte.
The slave asserts an acknowledge on SDA.
transaction.
AD7294
A
A
can read from multiple registers in one
POINT TO CONFIG REG (0x09)
DATA<7:0>
A
P
A
AD7294
...